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<title>u-boot.git/drivers/misc/Kconfig, branch v2016.09</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>misc: Add simple driver for some Nuvoton NCT6102D devices</title>
<updated>2016-08-16T03:44:09+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2016-07-19T05:45:46+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4cf9e464f78e58117b9a57e1e4e092e609d96b59'/>
<id>4cf9e464f78e58117b9a57e1e4e092e609d96b59</id>
<content type='text'>
This simple driver provides some functions to control some of the
integrated devices. The watchdog is enabled per default. This driver
adds a function to disable the watchdog. Also the internal legacy
UART (io address 0x3f8/0x2f8) is enabled per default.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This simple driver provides some functions to control some of the
integrated devices. The watchdog is enabled per default. This driver
adds a function to disable the watchdog. Also the internal legacy
UART (io address 0x3f8/0x2f8) is enabled per default.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>misc: add Tegra BPMP driver</title>
<updated>2016-08-15T17:26:12+00:00</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2016-08-08T15:41:34+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=73dd5c4cfeaff67347d8bafb25c197fc97c6a9dc'/>
<id>73dd5c4cfeaff67347d8bafb25c197fc97c6a9dc</id>
<content type='text'>
The Tegra BPMP (Boot and Power Management Processor) is a separate
auxiliary CPU embedded into Tegra to perform power management work, and
controls related features such as clocks, resets, power domains, PMIC I2C
bus, etc. This driver provides the core low-level communication path by
which feature-specific drivers (such as clock) can make requests to the
BPMP. This driver is similar to an MFD driver in the Linux kernel. It is
unconditionally selected by CONFIG_TEGRA186 since virtually any Tegra186
build of U-Boot will need the feature.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
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<pre>
The Tegra BPMP (Boot and Power Management Processor) is a separate
auxiliary CPU embedded into Tegra to perform power management work, and
controls related features such as clocks, resets, power domains, PMIC I2C
bus, etc. This driver provides the core low-level communication path by
which feature-specific drivers (such as clock) can make requests to the
BPMP. This driver is similar to an MFD driver in the Linux kernel. It is
unconditionally selected by CONFIG_TEGRA186 since virtually any Tegra186
build of U-Boot will need the feature.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drivers/sysreset: group sysreset drivers</title>
<updated>2016-08-12T13:22:17+00:00</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2016-08-07T05:53:00+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b25732c22beccb5a2ce3ec4174ea084ba0e176ab'/>
<id>b25732c22beccb5a2ce3ec4174ea084ba0e176ab</id>
<content type='text'>
Create drivers/sysreset and move sysreset-uclass and all sysreset
drivers there.

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Create drivers/sysreset and move sysreset-uclass and all sysreset
drivers there.

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>i2c_eeprom: Add reading support</title>
<updated>2016-07-22T13:52:59+00:00</updated>
<author>
<name>mario.six@gdsys.cc</name>
<email>mario.six@gdsys.cc</email>
</author>
<published>2016-06-22T13:14:16+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d7e28918aa3f4bafc15b16c546826d43fbcbe9f6'/>
<id>d7e28918aa3f4bafc15b16c546826d43fbcbe9f6</id>
<content type='text'>
This patch implements the reading functionality for the generic I2C
EEPROM driver, which was just a non-functional stub until now.

Since the page size will be of importance for the writing support, we
add suitable members to the private data structure to keep track of it.

Compatibility strings for a range of at24c* chips are added.

Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Heiko Schocher &lt;hs@denx.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch implements the reading functionality for the generic I2C
EEPROM driver, which was just a non-functional stub until now.

Since the page size will be of importance for the writing support, we
add suitable members to the private data structure to keep track of it.

Compatibility strings for a range of at24c* chips are added.

Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Heiko Schocher &lt;hs@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Rename reset to sysreset</title>
<updated>2016-05-27T02:48:31+00:00</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2016-05-12T18:03:35+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=11636258981a083957c19f3979796fde5e7e8080'/>
<id>11636258981a083957c19f3979796fde5e7e8080</id>
<content type='text'>
The current reset API implements a method to reset the entire system.
In the near future, I'd like to introduce code that implements the device
tree reset bindings; i.e. the equivalent of the Linux kernel's reset API.
This controls resets to individual HW blocks or external chips with reset
signals. It doesn't make sense to merge the two APIs into one since they
have different semantic purposes. Resolve the naming conflict by renaming
the existing reset API to sysreset instead, so the new reset API can be
called just reset.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The current reset API implements a method to reset the entire system.
In the near future, I'd like to introduce code that implements the device
tree reset bindings; i.e. the equivalent of the Linux kernel's reset API.
This controls resets to individual HW blocks or external chips with reset
signals. It doesn't make sense to merge the two APIs into one since they
have different semantic purposes. Resolve the naming conflict by renaming
the existing reset API to sysreset instead, so the new reset API can be
called just reset.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>cmd: qfw: rename qemu_fw_cfg.[c|h] to qfw.[c|h]</title>
<updated>2016-05-23T07:18:00+00:00</updated>
<author>
<name>Miao Yan</name>
<email>yanmiaobest@gmail.com</email>
</author>
<published>2016-05-23T02:37:17+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1868659002a6b7ab3b1da7be74f53d3e10e915be'/>
<id>1868659002a6b7ab3b1da7be74f53d3e10e915be</id>
<content type='text'>
Make file names consistent with CONFIG_QFW and CONFIG_CMD_QFW

Signed-off-by: Miao Yan &lt;yanmiaobest@gmail.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Make file names consistent with CONFIG_QFW and CONFIG_CMD_QFW

Signed-off-by: Miao Yan &lt;yanmiaobest@gmail.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: qemu: split qfw command interface and qfw core</title>
<updated>2016-05-23T07:18:00+00:00</updated>
<author>
<name>Miao Yan</name>
<email>yanmiaobest@gmail.com</email>
</author>
<published>2016-05-23T02:37:14+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=fcf5c04193b48c3f5e2d337a85d28c4026f90ac3'/>
<id>fcf5c04193b48c3f5e2d337a85d28c4026f90ac3</id>
<content type='text'>
This patch splits qfw command interface and qfw core function into two
files, and introduces a new Kconfig option (CONFIG_QFW) for qfw core.

Now when qfw command interface is enabled, it will automatically select
qfw core. This patch also makes the ACPI table generation select
CONFIG_QFW.

Signed-off-by: Miao Yan &lt;yanmiaobest@gmail.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch splits qfw command interface and qfw core function into two
files, and introduces a new Kconfig option (CONFIG_QFW) for qfw core.

Now when qfw command interface is enabled, it will automatically select
qfw core. This patch also makes the ACPI table generation select
CONFIG_QFW.

Signed-off-by: Miao Yan &lt;yanmiaobest@gmail.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>misc: Add simple driver to enable the legacy UART on Winbond Super IO chips</title>
<updated>2016-01-28T05:53:30+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2016-01-19T13:05:10+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=85056932f2bad4b6749d42c983d2219ae70fa741'/>
<id>85056932f2bad4b6749d42c983d2219ae70fa741</id>
<content type='text'>
On most x86 boards, the legacy serial ports (io address 0x3f8/0x2f8)
are provided by a superio chip connected to the LPC bus. We must
program the superio chip so that serial ports are available for us.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
On most x86 boards, the legacy serial ports (io address 0x3f8/0x2f8)
are provided by a superio chip connected to the LPC bus. We must
program the superio chip so that serial ports are available for us.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Cc: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dm: Add a power sequencing uclass</title>
<updated>2016-01-22T03:42:34+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2016-01-22T02:43:31+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5fd6badbd265ef45d3e1faebe5868426ab69595c'/>
<id>5fd6badbd265ef45d3e1faebe5868426ab69595c</id>
<content type='text'>
Some devices need special sequences to be used when starting up. Add a
uclass for this. Drivers can be added to provide specific features as
needed.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Some devices need special sequences to be used when starting up. Add a
uclass for this. Drivers can be added to provide specific features as
needed.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>driver: misc: add MXC_OCOTP Kconfig entry</title>
<updated>2015-10-30T14:01:27+00:00</updated>
<author>
<name>Peng Fan</name>
<email>Peng.Fan@freescale.com</email>
</author>
<published>2015-08-27T06:49:05+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3e020f03e94ffbb5ffda0a4579cf0f3dcfbe0fec'/>
<id>3e020f03e94ffbb5ffda0a4579cf0f3dcfbe0fec</id>
<content type='text'>
Add MXC_OCOTP Kconfig entry.

Signed-off-by: Peng Fan &lt;Peng.Fan@freescale.com&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
Cc: Fabio Estevam &lt;fabio.estevam@freescale.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add MXC_OCOTP Kconfig entry.

Signed-off-by: Peng Fan &lt;Peng.Fan@freescale.com&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
Cc: Stefano Babic &lt;sbabic@denx.de&gt;
Cc: Fabio Estevam &lt;fabio.estevam@freescale.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
