<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/drivers/misc/Kconfig, branch v2017.09</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>Kconfig: Add EEPROM options to Kconfig when I2C_EEPROM is set</title>
<updated>2017-09-02T19:50:30+00:00</updated>
<author>
<name>Adam Ford</name>
<email>aford173@gmail.com</email>
</author>
<published>2017-08-13T14:00:28+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e3f24d4f2c4ce48f666ef6098e166521dde6f688'/>
<id>e3f24d4f2c4ce48f666ef6098e166521dde6f688</id>
<content type='text'>
Add the following options to drivers/misc/Kconfig:
	SYS_I2C_EEPROM_ADDR
	SYS_I2C_EEPROM_BUS
	SYS_EEPROM_SIZE
	SYS_EEPROM_PAGE_WRITE_BITS
	SYS_EEPROM_PAGE_WRITE_DELAY_MS
	SYS_I2C_EEPROM_ADDR_LEN
	SYS_I2C_EEPROM_ADDR_OVERFLOW

This does not migrate any boards, but provides a foundations for
those who want/need these options

Signed-off-by: Adam Ford &lt;aford173@gmail.com&gt;
[trini: Migrate uniphier]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
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<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add the following options to drivers/misc/Kconfig:
	SYS_I2C_EEPROM_ADDR
	SYS_I2C_EEPROM_BUS
	SYS_EEPROM_SIZE
	SYS_EEPROM_PAGE_WRITE_BITS
	SYS_EEPROM_PAGE_WRITE_DELAY_MS
	SYS_I2C_EEPROM_ADDR_LEN
	SYS_I2C_EEPROM_ADDR_OVERFLOW

This does not migrate any boards, but provides a foundations for
those who want/need these options

Signed-off-by: Adam Ford &lt;aford173@gmail.com&gt;
[trini: Migrate uniphier]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drivers/misc: Add basic support for ATSHA204A Crypto module</title>
<updated>2017-07-12T04:57:38+00:00</updated>
<author>
<name>Marek Behún</name>
<email>marek.behun@nic.cz</email>
</author>
<published>2017-06-09T17:28:44+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=aa5eb9a3acb7552e715aad48ed0105b7c3d6ed51'/>
<id>aa5eb9a3acb7552e715aad48ed0105b7c3d6ed51</id>
<content type='text'>
This module can be found on the Turris Omnia board connected
via the I2C interface.

Among some cryptographic functions, the chip has a 512 bit
One Time Programmable memory, 88 byte configuration memory
and 512 byte general purpose memory.

The Turris Omnia stores serial number and device MAC address in
the OTP memory.

This commit adds basic support for reading the EEPROM and also
exposes the chips Random Number Generator.

The driver is based on code by
  Josh Datko, Cryptotronix, jbd@cryptotronix.com
and also
  Tomas Hlavacek, CZ.NIC, tomas.hlavacek@nic.cz

Signed-off-by: Tomas Hlavacek &lt;tomas.hlavacek@nic.cz&gt;
Signed-off-by: Marek Behun &lt;marek.behun@nic.cz&gt;

 create mode 100644 drivers/misc/atsha204a-i2c.c
 create mode 100644 include/atsha204a-i2c.h
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This module can be found on the Turris Omnia board connected
via the I2C interface.

Among some cryptographic functions, the chip has a 512 bit
One Time Programmable memory, 88 byte configuration memory
and 512 byte general purpose memory.

The Turris Omnia stores serial number and device MAC address in
the OTP memory.

This commit adds basic support for reading the EEPROM and also
exposes the chips Random Number Generator.

The driver is based on code by
  Josh Datko, Cryptotronix, jbd@cryptotronix.com
and also
  Tomas Hlavacek, CZ.NIC, tomas.hlavacek@nic.cz

Signed-off-by: Tomas Hlavacek &lt;tomas.hlavacek@nic.cz&gt;
Signed-off-by: Marek Behun &lt;marek.behun@nic.cz&gt;

 create mode 100644 drivers/misc/atsha204a-i2c.c
 create mode 100644 include/atsha204a-i2c.h
Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>rockchip: efuse: add (misc) driver for RK3399 non-secure efuse block</title>
<updated>2017-06-07T13:29:17+00:00</updated>
<author>
<name>Philipp Tomsich</name>
<email>philipp.tomsich@theobroma-systems.com</email>
</author>
<published>2017-05-05T17:21:38+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=49cd8e85eb70b5af4a27c7e006fbdd46d5796b2c'/>
<id>49cd8e85eb70b5af4a27c7e006fbdd46d5796b2c</id>
<content type='text'>
This adds a simple driver for reading the efuse block of the RK3399.
It should be easy enough to add drivers for other devices (e.g. the
RK3328, RK3368, etc.) by passing the device details via driver_data.

Unlike the kernel driver (using the nvmem subsystem), we don't expose
the efuse as multiple named cells, but rather as a linear memory that
can be read using misc_read(...).

The primary use case (as of today) is the generation of a 'serial#'
(and a 'cpuid#') environment variable for the RK3399-Q7 (Puma)
system-on-module.

Note that this adds a debug-only (i.e. only if DEBUG is defined)
command 'rk3399_dump_efuses' that dumps the efuse block's content.
N.B.: The name 'rk3399_dump_efuses' was intentionally chosen to
      include a SoC-name (together with a comment in the function) to
      remind whoever adds support for additional SoCs that this
      function currently makes assumptions regarding the size of the
      fuse-box based on the RK3399. The hope is that the function is
      adjusted to reflect any changes resulting from generalising the
      driver for multiple SoCs and is then renamed.

Signed-off-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;

Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This adds a simple driver for reading the efuse block of the RK3399.
It should be easy enough to add drivers for other devices (e.g. the
RK3328, RK3368, etc.) by passing the device details via driver_data.

Unlike the kernel driver (using the nvmem subsystem), we don't expose
the efuse as multiple named cells, but rather as a linear memory that
can be read using misc_read(...).

The primary use case (as of today) is the generation of a 'serial#'
(and a 'cpuid#') environment variable for the RK3399-Q7 (Puma)
system-on-module.

Note that this adds a debug-only (i.e. only if DEBUG is defined)
command 'rk3399_dump_efuses' that dumps the efuse block's content.
N.B.: The name 'rk3399_dump_efuses' was intentionally chosen to
      include a SoC-name (together with a comment in the function) to
      remind whoever adds support for additional SoCs that this
      function currently makes assumptions regarding the size of the
      fuse-box based on the RK3399. The hope is that the function is
      adjusted to reflect any changes resulting from generalising the
      driver for multiple SoCs and is then renamed.

Signed-off-by: Philipp Tomsich &lt;philipp.tomsich@theobroma-systems.com&gt;

Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Convert CONFIG_DS4510 to Kconfig</title>
<updated>2017-05-22T12:37:08+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2017-05-17T09:25:02+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=879704d8f7387b05272b79197a3c782d1499283b'/>
<id>879704d8f7387b05272b79197a3c782d1499283b</id>
<content type='text'>
This converts the following to Kconfig:
   CONFIG_DS4510

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Heiko Schocher &lt;hs@denx.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This converts the following to Kconfig:
   CONFIG_DS4510

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
Reviewed-by: Heiko Schocher &lt;hs@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>misc: implement Tegra CAR core driver</title>
<updated>2016-09-27T16:11:02+00:00</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2016-09-13T16:45:57+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=bd3ee84ac71237656992ae78d0c7dfa7dcb4ceac'/>
<id>bd3ee84ac71237656992ae78d0c7dfa7dcb4ceac</id>
<content type='text'>
The Tegra CAR (Clock And Reset) module provides control of most clocks
and reset signals within the Tegra SoC. This change implements a driver
for this module. However, since the module implements multiple kinds of
services (clocks, resets, perhaps more), all this driver does is bind
various sub-devices, which in turn provide the real services. This driver
is essentially an "MFD" (Multi-Function Device) in Linux kernel speak.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The Tegra CAR (Clock And Reset) module provides control of most clocks
and reset signals within the Tegra SoC. This change implements a driver
for this module. However, since the module implements multiple kinds of
services (clocks, resets, perhaps more), all this driver does is bind
various sub-devices, which in turn provide the real services. This driver
is essentially an "MFD" (Multi-Function Device) in Linux kernel speak.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>misc: Add simple driver for some Nuvoton NCT6102D devices</title>
<updated>2016-08-16T03:44:09+00:00</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2016-07-19T05:45:46+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4cf9e464f78e58117b9a57e1e4e092e609d96b59'/>
<id>4cf9e464f78e58117b9a57e1e4e092e609d96b59</id>
<content type='text'>
This simple driver provides some functions to control some of the
integrated devices. The watchdog is enabled per default. This driver
adds a function to disable the watchdog. Also the internal legacy
UART (io address 0x3f8/0x2f8) is enabled per default.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This simple driver provides some functions to control some of the
integrated devices. The watchdog is enabled per default. This driver
adds a function to disable the watchdog. Also the internal legacy
UART (io address 0x3f8/0x2f8) is enabled per default.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Cc: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>misc: add Tegra BPMP driver</title>
<updated>2016-08-15T17:26:12+00:00</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2016-08-08T15:41:34+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=73dd5c4cfeaff67347d8bafb25c197fc97c6a9dc'/>
<id>73dd5c4cfeaff67347d8bafb25c197fc97c6a9dc</id>
<content type='text'>
The Tegra BPMP (Boot and Power Management Processor) is a separate
auxiliary CPU embedded into Tegra to perform power management work, and
controls related features such as clocks, resets, power domains, PMIC I2C
bus, etc. This driver provides the core low-level communication path by
which feature-specific drivers (such as clock) can make requests to the
BPMP. This driver is similar to an MFD driver in the Linux kernel. It is
unconditionally selected by CONFIG_TEGRA186 since virtually any Tegra186
build of U-Boot will need the feature.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The Tegra BPMP (Boot and Power Management Processor) is a separate
auxiliary CPU embedded into Tegra to perform power management work, and
controls related features such as clocks, resets, power domains, PMIC I2C
bus, etc. This driver provides the core low-level communication path by
which feature-specific drivers (such as clock) can make requests to the
BPMP. This driver is similar to an MFD driver in the Linux kernel. It is
unconditionally selected by CONFIG_TEGRA186 since virtually any Tegra186
build of U-Boot will need the feature.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drivers/sysreset: group sysreset drivers</title>
<updated>2016-08-12T13:22:17+00:00</updated>
<author>
<name>Max Filippov</name>
<email>jcmvbkbc@gmail.com</email>
</author>
<published>2016-08-07T05:53:00+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b25732c22beccb5a2ce3ec4174ea084ba0e176ab'/>
<id>b25732c22beccb5a2ce3ec4174ea084ba0e176ab</id>
<content type='text'>
Create drivers/sysreset and move sysreset-uclass and all sysreset
drivers there.

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Create drivers/sysreset and move sysreset-uclass and all sysreset
drivers there.

Signed-off-by: Max Filippov &lt;jcmvbkbc@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>i2c_eeprom: Add reading support</title>
<updated>2016-07-22T13:52:59+00:00</updated>
<author>
<name>mario.six@gdsys.cc</name>
<email>mario.six@gdsys.cc</email>
</author>
<published>2016-06-22T13:14:16+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d7e28918aa3f4bafc15b16c546826d43fbcbe9f6'/>
<id>d7e28918aa3f4bafc15b16c546826d43fbcbe9f6</id>
<content type='text'>
This patch implements the reading functionality for the generic I2C
EEPROM driver, which was just a non-functional stub until now.

Since the page size will be of importance for the writing support, we
add suitable members to the private data structure to keep track of it.

Compatibility strings for a range of at24c* chips are added.

Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Heiko Schocher &lt;hs@denx.de&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This patch implements the reading functionality for the generic I2C
EEPROM driver, which was just a non-functional stub until now.

Since the page size will be of importance for the writing support, we
add suitable members to the private data structure to keep track of it.

Compatibility strings for a range of at24c* chips are added.

Signed-off-by: Mario Six &lt;mario.six@gdsys.cc&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Heiko Schocher &lt;hs@denx.de&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Rename reset to sysreset</title>
<updated>2016-05-27T02:48:31+00:00</updated>
<author>
<name>Stephen Warren</name>
<email>swarren@nvidia.com</email>
</author>
<published>2016-05-12T18:03:35+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=11636258981a083957c19f3979796fde5e7e8080'/>
<id>11636258981a083957c19f3979796fde5e7e8080</id>
<content type='text'>
The current reset API implements a method to reset the entire system.
In the near future, I'd like to introduce code that implements the device
tree reset bindings; i.e. the equivalent of the Linux kernel's reset API.
This controls resets to individual HW blocks or external chips with reset
signals. It doesn't make sense to merge the two APIs into one since they
have different semantic purposes. Resolve the naming conflict by renaming
the existing reset API to sysreset instead, so the new reset API can be
called just reset.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The current reset API implements a method to reset the entire system.
In the near future, I'd like to introduce code that implements the device
tree reset bindings; i.e. the equivalent of the Linux kernel's reset API.
This controls resets to individual HW blocks or external chips with reset
signals. It doesn't make sense to merge the two APIs into one since they
have different semantic purposes. Resolve the naming conflict by renaming
the existing reset API to sysreset instead, so the new reset API can be
called just reset.

Signed-off-by: Stephen Warren &lt;swarren@nvidia.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
</feed>
