u-boot.git/drivers/misc/Makefile, branch v2013.10

Add GPL-2.0+ SPDX-License-Identifier to source files

2013-07-24T13:44:38+00:00

Signed-off-by: Wolfgang Denk 
[trini: Fixup common/cmd_io.c]
Signed-off-by: Tom Rini

cros: add LPC support for cros_ec

2013-06-26T14:13:28+00:00

This patch adds LPC support for carrying out the cros_ec protocol.

Signed-off-by: Randall Spangler 
Signed-off-by: Simon Glass 
Signed-off-by: Hung-ying Tyan 
Acked-by: Simon Glass 
Tested-by: Simon Glass

cros: exynos: add SPI support for cros_ec

2013-06-26T14:13:24+00:00

This patch adds SPI support for carrying out the cros_ec protocol.

Signed-off-by: Hung-ying Tyan 
Signed-off-by: Randall Spangler 
Signed-off-by: Simon Glass 
Acked-by: Simon Glass

cros: add I2C support for cros_ec

2013-06-26T14:12:24+00:00

This patch adds I2C support for carrying out the cros_ec protocol.

Signed-off-by: Randall Spangler 
Signed-off-by: Simon Glass 
Signed-off-by: Hung-ying Tyan 
Acked-by: Simon Glass 
Tested-by: Simon Glass

cros: add cros_ec driver

2013-06-26T14:07:11+00:00

This patch adds the cros_ec driver that implements the protocol for
communicating with Google's ChromeOS embedded controller.

Signed-off-by: Bernie Thompson 
Signed-off-by: Bill Richardson 
Signed-off-by: Che-Liang Chiou 
Signed-off-by: Doug Anderson 
Signed-off-by: Gabe Black 
Signed-off-by: Hung-ying Tyan 
Signed-off-by: Louis Yung-Chieh Lo 
Signed-off-by: Randall Spangler 
Signed-off-by: Sean Paul 
Signed-off-by: Simon Glass 
Signed-off-by: Vincent Palatin 
Acked-by: Simon Glass 
Tested-by: Simon Glass

Add mxc_ocotp driver

2013-04-28T09:07:43+00:00

Add an mxc_ocotp driver for i.MX6.

Signed-off-by: Benoît Thébaudeau

Add fsl_iim driver

2013-04-28T09:07:41+00:00

Add a fsl_iim driver common to i.MX and MPC.

Signed-off-by: Benoît Thébaudeau

x86: Add CBMEM console driver for coreboot

2012-11-30T21:44:03+00:00

This patch builds upon the recently introduced CBMEM console
feature of coreboot.

CBMEM console uses a memry area allocated by coreboot to store
the console output. The memory area has a certain structure,
which allows to determine where the buffer is, the buffer size
and the location of the pointer in the buffer. This allows
different phases of the firmware (rom based coreboot, ram based
coreboot, u-boot after relocation with this change) to keep
adding text to the same buffer.

Note that this patch introduces a new console driver and adds the
driver to the list of drivers to be used for console output, i.e.
it engages only after u-boot relocates. Usiong CBMEM console for
capturing the pre-relocation console output will be done under a
separate change.

>From Linux, run the cbmem.py utility (which is a part of the coreboot
package) to see the output, e.g.:

vvvvvvvvvvvvvvvvv
SCSI:  AHCI 0001.0300 32 slots 6 ports ? Gbps 0xf impl SATA mode
flags: 64bit ilck stag led pmp pio
...
Magic signature found
Kernel command line: "cros_secure  quiet loglevel=1 console=tty2...
^^^^^^^^^^^^^^^^^

Note that the entire u-boot output fits into the buffer only if
the coreboot log level is reduced from the most verbose. Ether
the buffer size will have to be increased, or the coreboot
verbosity permanently reduced.

Signed-off-by: Vadim Bendebury 
Signed-off-by: Simon Glass

powerpc/mpc8xxx: move LAW code into arch/powerpc/cpu/mpc8xxx

2012-11-26T21:41:22+00:00

It's arch code and not a driver, so move it where it belongs.  When it
originally went into drivers/misc there was no 8xxx CPU directory.

This will make new-SPL support a little easier since we can keep the CPU
stuff together and not need to pull stuff in from drivers/misc.

Signed-off-by: Scott Wood 
Cc: Andy Fleming

pmic: Move pmic related code to ./drivers/power directory

2012-11-14T10:21:09+00:00

The PMIC framework has been moved to its more natural place
./drivers/power from ./drivers/misc directory.

Signed-off-by: Lukasz Majewski 
Signed-off-by: Kyungmin Park