u-boot.git/drivers/misc/Makefile, branch v2020.04 Unnamed repository; edit this file 'description' to name the repository. common: Drop floppy disk support 2020-01-17T18:26:50+00:00 Simon Glass sjg@chromium.org 2019-12-28T17:44:47+00:00 015e3348fc3f0f20fd9286bf245e26212568ec93 This seems pretty old now. It has not been converted to driver model and is not used by any boards. Drop it. Signed-off-by: Simon Glass <sjg@chromium.org> 
This seems pretty old now. It has not been converted to driver model and
is not used by any boards.

Drop it.

Signed-off-by: Simon Glass <sjg@chromium.org>
sandbox: Add a test for IRQ 2019-12-15T03:44:12+00:00 Simon Glass sjg@chromium.org 2019-12-07T04:41:59+00:00 fbb0efdd272ed0ad232bf917648e161b31226ec5 Add a simple sandbox test for this uclass. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 
Add a simple sandbox test for this uclass.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
x86: Move UCLASS_IRQ into a separate file 2019-12-15T03:44:12+00:00 Simon Glass sjg@chromium.org 2019-12-07T04:41:58+00:00 79d66a6ac117dc4978c3ee66e342ad06411d390c Update this uclass to support the needs of the Apollo Lake ITSS. It supports four operations. Move the uclass into a separate directory so that sandbox can use it too. Add a new Kconfig to control it and enable this on x86. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 
Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
sandbox: Add PCI driver and test for p2sb 2019-12-15T03:44:11+00:00 Simon Glass sjg@chromium.org 2019-12-07T04:41:57+00:00 3e17ffbb44cd24c53504179ff51a835502b183ed Add a sandbox driver and PCI-device emulator for p2sb. Also add a test which uses a simple 'adder' driver to test the p2sb functionality. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 
Add a sandbox driver and PCI-device emulator for p2sb. Also add a test
which uses a simple 'adder' driver to test the p2sb functionality.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
pci: Add support for p2sb uclass 2019-12-15T03:44:11+00:00 Simon Glass sjg@chromium.org 2019-12-07T04:41:55+00:00 5bee27aa41eeafb71f1d467f81f7fae6ee8cfa6d The Primary-to-Sideband bus (P2SB) is used to access various peripherals through memory-mapped I/O in a large chunk of PCI space. The space is segmented into different channels and peripherals are accessed by device-specific means within those channels. Devices should be added in the device tree as subnodes of the p2sb. This adds a uclass and enables it for sandbox. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> 
The Primary-to-Sideband bus (P2SB) is used to access various peripherals
through memory-mapped I/O in a large chunk of PCI space. The space is
segmented into different channels and peripherals are accessed by
device-specific means within those channels. Devices should be added in
the device tree as subnodes of the p2sb.

This adds a uclass and enables it for sandbox.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
misc: add driver for the Rockchip otp controller 2019-11-17T09:23:15+00:00 Finley Xiao finley.xiao@rock-chips.com 2019-09-25T15:57:49+00:00 a907dc3f25fa90becb4202c7cf973b4fc5abaa1b Newer Rockchip socs like the px30 use a different ip block to handle one-time-programmable memory, so add a misc driver for it as well. Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> 
Newer Rockchip socs like the px30 use a different ip block to handle
one-time-programmable memory, so add a misc driver for it as well.

Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko.stuebner@theobroma-systems.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>
misc: k3_avs: add driver for K3 Adaptive Voltage Scaling Class 0 2019-11-07T23:39:16+00:00 Tero Kristo t-kristo@ti.com 2019-10-24T09:30:46+00:00 9d233b4e3ed675561c4e3bd904e0a314f20dbe82 Adaptive Voltage Scaling is a technology used in TI SoCs to optimize the operating voltage based on characterization data written to efuse during production. Add a driver to support this feature for K3 line of SoCs, initially for AM65x. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Keerthy <j-keerthy@ti.com> 
Adaptive Voltage Scaling is a technology used in TI SoCs to optimize
the operating voltage based on characterization data written to efuse
during production. Add a driver to support this feature for K3 line of
SoCs, initially for AM65x.

Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Keerthy <j-keerthy@ti.com>
misc: microchip_flexcom: introduce microchip_flexcom driver 2019-10-24T10:01:57+00:00 Eugen Hristev eugen.hristev@microchip.com 2019-10-09T09:23:39+00:00 f81649586df766083c987bfa6ea72547fc5acb7e The Microchip Flexcom is just a wrapper which embeds a SPI controller, an I2C controller and an USART. Only one function can be used at a time and is chosen at boot time according to the device tree. The bindings are kept as in Linux. The driver registers to MISC_UCLASS. Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com> 
The Microchip Flexcom is just a wrapper which embeds a SPI controller,
an I2C controller and an USART.
Only one function can be used at a time and is chosen at boot time according
to the device tree.
The bindings are kept as in Linux.
The driver registers to MISC_UCLASS.

Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
sandbox: pci: Create a new sandbox_pci_read_bar() function 2019-10-08T05:57:48+00:00 Simon Glass sjg@chromium.org 2019-09-25T14:56:42+00:00 75d8f49481a5c260d0cf1024d41f0b29d57e0efe The code in swapcase can be used by other sandbox drivers. Move it into a common place to allow this. Signed-off-by: Simon Glass <sjg@chromium.org> Reviewed-by: Bin Meng <bmeng.cn@gmail.com> Tested-by: Bin Meng <bmeng.cn@gmail.com> [bmeng: remove inclusion of <asm/test.h> in pci_sandbox.c] Signed-off-by: Bin Meng <bmeng.cn@gmail.com> 
The code in swapcase can be used by other sandbox drivers. Move it into a
common place to allow this.

Signed-off-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Bin Meng <bmeng.cn@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>
[bmeng: remove inclusion of <asm/test.h> in pci_sandbox.c]
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
spl: misc: Allow misc drivers in SPL and TPL 2019-05-21T23:33:23+00:00 Simon Glass sjg@chromium.org 2018-11-18T15:14:27+00:00 aaba703fd0f08f3c63ad241cbb29273f0ebbf2a6 In some cases it is necessary to read the keyboard in early phases of U-Boot. The cros_ec keyboard is kept in the misc directory. Update the config to allow this. Signed-off-by: Simon Glass <sjg@chromium.org> 
In some cases it is necessary to read the keyboard in early phases of
U-Boot. The cros_ec keyboard is kept in the misc directory. Update the
config to allow this.

Signed-off-by: Simon Glass <sjg@chromium.org>