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<title>u-boot.git/drivers/misc/Makefile, branch v2021.04</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/misc/Makefile?h=v2021.04</id>
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<updated>2021-02-21T05:07:30Z</updated>
<entry>
<title>dm: i2c: allow disabling driver model in SPL</title>
<updated>2021-02-21T05:07:30Z</updated>
<author>
<name>Igor Opaniuk</name>
<email>igor.opaniuk@foundries.io</email>
</author>
<published>2021-02-09T11:52:43Z</published>
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<id>urn:sha1:d1f3abe1e71f8e160ca09272ff0463b1b927635d</id>
<content type='text'>
At present if U-Boot proper uses driver model for I2C, then SPL has to
also. While this is desirable, it places a significant barrier to moving
to driver model in some cases. For example, with a space-constrained SPL
it may be necessary to enable CONFIG_SPL_OF_PLATDATA which involves
adjusting some drivers.

This patch introduces a separate Kconfig symbols for enabling DM_I2C and
DM_I2C_GPIO support in SPL.

This will also help to get away from dirty workarounds to
achieve non-DM I2C support for SPL, which is currently used in some
board header files like:

ifdef CONFIG_SPL_BUILD
undef CONFIG_DM_I2C
endif

Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Heiko Schocher &lt;hs@denx.de&gt;
Signed-off-by: Igor Opaniuk &lt;igor.opaniuk@foundries.io&gt;
Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>test: Move some test drivers into their own file</title>
<updated>2021-01-05T19:24:40Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2020-12-23T15:11:18Z</published>
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<id>urn:sha1:079ac59586fa1e0c69020e74e4f16cbfdf82232d</id>
<content type='text'>
At present several test drivers are part of the test file itself. Some of
these are useful for of-platdata tests. Separate them out so we can use
them for other things also.

A few adjustments are needed so this driver can build for sandbox_spl as
well.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>misc: add driver for the SiFive otp controller</title>
<updated>2020-06-04T01:44:08Z</updated>
<author>
<name>Pragnesh Patel</name>
<email>pragnesh.patel@sifive.com</email>
</author>
<published>2020-05-29T06:03:21Z</published>
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<id>urn:sha1:05307213c6aca1fdb300c8854c4b5881451b633d</id>
<content type='text'>
Added a misc driver to handle OTP memory in SiFive SoCs.

Signed-off-by: Pragnesh Patel &lt;pragnesh.patel@sifive.com&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Tested-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
Tested-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
</content>
</entry>
<entry>
<title>misc: pmic_esm: Add support for PMIC ESM driver</title>
<updated>2020-03-03T07:38:14Z</updated>
<author>
<name>Tero Kristo</name>
<email>t-kristo@ti.com</email>
</author>
<published>2020-02-14T09:18:16Z</published>
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<id>urn:sha1:3b36b38f50cc3063f922db629f529b11ff92332b</id>
<content type='text'>
The ESM (Error Signal Monitor) is used on certain PMIC versions to
handle error signals propagating from rest of the system. If these
reach the PMIC, it is typically a last resort fatal error which
requires a system reset. The ESM driver does the proper configuration
for the ESM module to reach this end goal. Initially, only TPS65941
PMIC is supported for this.

Signed-off-by: Tero Kristo &lt;t-kristo@ti.com&gt;
</content>
</entry>
<entry>
<title>misc: k3_esm: Add support for Texas Instruments K3 ESM driver</title>
<updated>2020-03-03T07:38:14Z</updated>
<author>
<name>Tero Kristo</name>
<email>t-kristo@ti.com</email>
</author>
<published>2020-02-14T09:18:15Z</published>
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<id>urn:sha1:344eb6d572adfadb0a11196ef8cf6508f6c704df</id>
<content type='text'>
The ESM (Error Signaling Module) is used to route error signals within
the K3 SoCs somewhat similar to interrupts. The handling for these is
different though, and can be routed for hardware error handling, to
be handled by safety processor or just as error interrupts handled
by the main processor. The u-boot level ESM driver is just used to
configure the ESM signals so that they get routed to proper destination.

Signed-off-by: Tero Kristo &lt;t-kristo@ti.com&gt;
</content>
</entry>
<entry>
<title>common: Drop floppy disk support</title>
<updated>2020-01-17T18:26:50Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2019-12-28T17:44:47Z</published>
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<id>urn:sha1:015e3348fc3f0f20fd9286bf245e26212568ec93</id>
<content type='text'>
This seems pretty old now. It has not been converted to driver model and
is not used by any boards.

Drop it.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>sandbox: Add a test for IRQ</title>
<updated>2019-12-15T03:44:12Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2019-12-07T04:41:59Z</published>
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<id>urn:sha1:fbb0efdd272ed0ad232bf917648e161b31226ec5</id>
<content type='text'>
Add a simple sandbox test for this uclass.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>x86: Move UCLASS_IRQ into a separate file</title>
<updated>2019-12-15T03:44:12Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2019-12-07T04:41:58Z</published>
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<id>urn:sha1:79d66a6ac117dc4978c3ee66e342ad06411d390c</id>
<content type='text'>
Update this uclass to support the needs of the Apollo Lake ITSS. It
supports four operations.

Move the uclass into a separate directory so that sandbox can use it too.
Add a new Kconfig to control it and enable this on x86.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>sandbox: Add PCI driver and test for p2sb</title>
<updated>2019-12-15T03:44:11Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2019-12-07T04:41:57Z</published>
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<id>urn:sha1:3e17ffbb44cd24c53504179ff51a835502b183ed</id>
<content type='text'>
Add a sandbox driver and PCI-device emulator for p2sb. Also add a test
which uses a simple 'adder' driver to test the p2sb functionality.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>pci: Add support for p2sb uclass</title>
<updated>2019-12-15T03:44:11Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2019-12-07T04:41:55Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=5bee27aa41eeafb71f1d467f81f7fae6ee8cfa6d'/>
<id>urn:sha1:5bee27aa41eeafb71f1d467f81f7fae6ee8cfa6d</id>
<content type='text'>
The Primary-to-Sideband bus (P2SB) is used to access various peripherals
through memory-mapped I/O in a large chunk of PCI space. The space is
segmented into different channels and peripherals are accessed by
device-specific means within those channels. Devices should be added in
the device tree as subnodes of the p2sb.

This adds a uclass and enables it for sandbox.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
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