<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/drivers/misc, branch v2015.04-rc1</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>dm: cros_ec: Convert cros_ec_i2c over to driver model</title>
<updated>2015-01-30T00:10:01+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2015-01-27T03:29:40+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=85df958ce267c602a4ec5f1e41f336c5a8d3b441'/>
<id>85df958ce267c602a4ec5f1e41f336c5a8d3b441</id>
<content type='text'>
Move this driver to use driver model and update the snow configuration to
match.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Move this driver to use driver model and update the snow configuration to
match.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dm: cros_ec_spi: Remove old pre-driver-model code</title>
<updated>2015-01-30T00:09:57+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2015-01-25T15:27:19+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b2568f0d57e45bfc9a87f94030a8bf61f6c479a1'/>
<id>b2568f0d57e45bfc9a87f94030a8bf61f6c479a1</id>
<content type='text'>
This is no-longer needed since all platforms use SPI for cros_ec.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This is no-longer needed since all platforms use SPI for cros_ec.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dm: cros_ec: Don't require protocol 3 support</title>
<updated>2015-01-30T00:09:57+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2015-01-25T15:27:17+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8bbb38b15fd585a9d51f8ee064ce17e535d8025e'/>
<id>8bbb38b15fd585a9d51f8ee064ce17e535d8025e</id>
<content type='text'>
I2C is now deprecated on ARM platforms and there are no devices that use it
with the v3 protocol. We can't require v3 support if we want to support I2C.
Adjust the error handling to suit.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
I2C is now deprecated on ARM platforms and there are no devices that use it
with the v3 protocol. We can't require v3 support if we want to support I2C.
Adjust the error handling to suit.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dm: spi: Move slave details to child platdata</title>
<updated>2015-01-30T00:09:56+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2015-01-25T15:27:12+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d0cff03e187cc1de3d6b477b92c376aae27c95e8'/>
<id>d0cff03e187cc1de3d6b477b92c376aae27c95e8</id>
<content type='text'>
At present we go through various contortions to store the SPI slave's chip
select in its private data. This only exists when the slave is active so
must be set up when it is probed. Until the device is probed we don't
actually know what chip select it will appear on.

However, now that we can support per-child platform data, we can use that
instead. This allows us to set up the chip select when the child is bound,
and avoid the messy contortions.

Unfortunately this is a fairly large change and it seems to be difficult to
break it down further.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
At present we go through various contortions to store the SPI slave's chip
select in its private data. This only exists when the slave is active so
must be set up when it is probed. Until the device is probed we don't
actually know what chip select it will appear on.

However, now that we can support per-child platform data, we can use that
instead. This allows us to set up the chip select when the child is bound,
and avoid the messy contortions.

Unfortunately this is a fairly large change and it seems to be difficult to
break it down further.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dm: cros_ec: Remove use of fdtdec GPIO support</title>
<updated>2015-01-30T00:09:51+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2015-01-06T03:05:32+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=32f8a19f6d9aa551dc64868fac4b662c088dfb1f'/>
<id>32f8a19f6d9aa551dc64868fac4b662c088dfb1f</id>
<content type='text'>
These functions are going away, so use the new uclass support instead.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
These functions are going away, so use the new uclass support instead.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>i2c_eeprom: include &lt;linux/err.h&gt; to fix build error</title>
<updated>2015-01-06T00:45:15+00:00</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.m@jp.panasonic.com</email>
</author>
<published>2014-12-18T11:00:26+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ee5ee87642fdf57ee0c116b9bb5d65b838f09897'/>
<id>ee5ee87642fdf57ee0c116b9bb5d65b838f09897</id>
<content type='text'>
drivers/misc/i2c_eeprom.c fails to build unless CONFIG_FIT_SIGNATURE
is defined.

  CC      drivers/misc/i2c_eeprom.o
drivers/misc/i2c_eeprom.c: In function 'i2c_eeprom_read':
drivers/misc/i2c_eeprom.c:15:10: error: 'ENODEV' undeclared
(first use in this function)
drivers/misc/i2c_eeprom.c:15:10: note: each undeclared identifier
is reported only once for each function it appears in
drivers/misc/i2c_eeprom.c: In function 'i2c_eeprom_write':
drivers/misc/i2c_eeprom.c:21:10: error: 'ENODEV' undeclared
(first use in this function)
drivers/misc/i2c_eeprom.c:22:1: warning: control reaches end of
non-void function [-Wreturn-type]
drivers/misc/i2c_eeprom.c: In function 'i2c_eeprom_read':
drivers/misc/i2c_eeprom.c:16:1: warning: control reaches end of
non-void function [-Wreturn-type]
make[2]: *** [drivers/misc/i2c_eeprom.o] Error 1
make[1]: *** [drivers/misc] Error 2
make: *** [drivers] Error 2

By the way, Sandbox (enabling CONFIG_FIT_SIGNATURE) is luckily
working depending on it.
Sandbox includes include/asm-generic/errno.h
            from include/errno.h
            from include/u-boot/rsa-checksum.h
            from include/image.h
            from include/common.h
            from drivers/misc/i2c_eeprom.c

Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
drivers/misc/i2c_eeprom.c fails to build unless CONFIG_FIT_SIGNATURE
is defined.

  CC      drivers/misc/i2c_eeprom.o
drivers/misc/i2c_eeprom.c: In function 'i2c_eeprom_read':
drivers/misc/i2c_eeprom.c:15:10: error: 'ENODEV' undeclared
(first use in this function)
drivers/misc/i2c_eeprom.c:15:10: note: each undeclared identifier
is reported only once for each function it appears in
drivers/misc/i2c_eeprom.c: In function 'i2c_eeprom_write':
drivers/misc/i2c_eeprom.c:21:10: error: 'ENODEV' undeclared
(first use in this function)
drivers/misc/i2c_eeprom.c:22:1: warning: control reaches end of
non-void function [-Wreturn-type]
drivers/misc/i2c_eeprom.c: In function 'i2c_eeprom_read':
drivers/misc/i2c_eeprom.c:16:1: warning: control reaches end of
non-void function [-Wreturn-type]
make[2]: *** [drivers/misc/i2c_eeprom.o] Error 1
make[1]: *** [drivers/misc] Error 2
make: *** [drivers] Error 2

By the way, Sandbox (enabling CONFIG_FIT_SIGNATURE) is luckily
working depending on it.
Sandbox includes include/asm-generic/errno.h
            from include/errno.h
            from include/u-boot/rsa-checksum.h
            from include/image.h
            from include/common.h
            from drivers/misc/i2c_eeprom.c

Signed-off-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>x86: Add a simple superio driver for SMSC LPC47M</title>
<updated>2014-12-14T05:32:05+00:00</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2014-12-12T13:05:25+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a2927e09bccca5b665709d77fc54919292d4bcb7'/>
<id>a2927e09bccca5b665709d77fc54919292d4bcb7</id>
<content type='text'>
On most x86 boards, the legacy serial ports (io address 0x3f8/0x2f8)
are provided by a superio chip connected to the LPC bus. We must
program the superio chip so that serial ports are available for us.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
On most x86 boards, the legacy serial ports (io address 0x3f8/0x2f8)
are provided by a superio chip connected to the LPC bus. We must
program the superio chip so that serial ports are available for us.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dm: Add a simple EEPROM driver</title>
<updated>2014-12-11T20:18:43+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2014-12-10T15:55:54+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=20142019a96a72bf1516be93a86fc10d028fd136'/>
<id>20142019a96a72bf1516be93a86fc10d028fd136</id>
<content type='text'>
There seem to be a few EEPROM drivers around - perhaps we should have a
single standard one? This simple driver is used for sandbox testing, but
could be pressed into more active service.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Acked-by: Heiko Schocher &lt;hs@denx.de&gt;
Reviewed-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
There seem to be a few EEPROM drivers around - perhaps we should have a
single standard one? This simple driver is used for sandbox testing, but
could be pressed into more active service.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Acked-by: Heiko Schocher &lt;hs@denx.de&gt;
Reviewed-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>dm: i2c: Add an I2C EEPROM simulator</title>
<updated>2014-12-11T20:18:42+00:00</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2014-12-10T15:55:51+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6ec1b7535873dee4c73895e430494e12be4e3e4d'/>
<id>6ec1b7535873dee4c73895e430494e12be4e3e4d</id>
<content type='text'>
To enable testing of I2C, add a simple I2C EEPROM simulator for sandbox.
It supports reading and writing from a small data store.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Acked-by: Heiko Schocher &lt;hs@denx.de&gt;
Reviewed-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
To enable testing of I2C, add a simple I2C EEPROM simulator for sandbox.
It supports reading and writing from a small data store.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Acked-by: Heiko Schocher &lt;hs@denx.de&gt;
Reviewed-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mxc_ocotp: Do not disable the OCOTP clock after every access</title>
<updated>2014-12-01T09:20:19+00:00</updated>
<author>
<name>Fabio Estevam</name>
<email>fabio.estevam@freescale.com</email>
</author>
<published>2014-11-25T15:11:08+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a847fff11cc4f3745d0087d45d2e5964c47f55d2'/>
<id>a847fff11cc4f3745d0087d45d2e5964c47f55d2</id>
<content type='text'>
Leave the OCOTP turned on, so that we subsequent access do not fail.

After enabling the thermal driver on a mx6sxsabresd board:

U-Boot 2015.01-rc1-18267-g99d4189-dirty (Nov 24 2014 - 12:59:01)

CPU:   Freescale i.MX6SX rev1.0 at 792 MHz
CPU:   Temperature 48 C
Reset cause: POR
Board: MX6SX SABRE SDB
I2C:   ready
DRAM:  1 GiB
PMIC:  PFUZE100 ID=0x10
MMC:   FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
  00:01.0     - 16c3:abcd - Bridge device
   01:00.0    - 8086:08b1 - Network controller
In:    serial
Out:   serial
Err:   serial
Net:
(hang)

As the thermal driver accesses the ocotp registers, its clock will be disabled
afterwards.

Then when the MAC address is read (also from ocotp registers) it will cause a
hang.

Do not disable the ocotp clock to prevent this problem.

Signed-off-by: Fabio Estevam &lt;fabio.estevam@freescale.com&gt;
Reviewed-by: Benoît Thébaudeau &lt;benoit.thebaudeau.dev@gmail.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Leave the OCOTP turned on, so that we subsequent access do not fail.

After enabling the thermal driver on a mx6sxsabresd board:

U-Boot 2015.01-rc1-18267-g99d4189-dirty (Nov 24 2014 - 12:59:01)

CPU:   Freescale i.MX6SX rev1.0 at 792 MHz
CPU:   Temperature 48 C
Reset cause: POR
Board: MX6SX SABRE SDB
I2C:   ready
DRAM:  1 GiB
PMIC:  PFUZE100 ID=0x10
MMC:   FSL_SDHC: 0, FSL_SDHC: 1, FSL_SDHC: 2
  00:01.0     - 16c3:abcd - Bridge device
   01:00.0    - 8086:08b1 - Network controller
In:    serial
Out:   serial
Err:   serial
Net:
(hang)

As the thermal driver accesses the ocotp registers, its clock will be disabled
afterwards.

Then when the MAC address is read (also from ocotp registers) it will cause a
hang.

Do not disable the ocotp clock to prevent this problem.

Signed-off-by: Fabio Estevam &lt;fabio.estevam@freescale.com&gt;
Reviewed-by: Benoît Thébaudeau &lt;benoit.thebaudeau.dev@gmail.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
