u-boot.git/drivers/misc, branch v2015.07-rc1 Unnamed repository; edit this file 'description' to name the repository. x86: Set serial port IRQ for SMSC LPC47M 2015-04-30T00:51:48+00:00 Bin Meng bmeng.cn@gmail.com 2015-03-31T03:25:03+00:00 19268834fb208a7deb43f9a00b034e0c6abab3cd For starting a Linux console on the superio serial port under interrupt mode, the IRQ number must be configured. Signed-off-by: Jian Luo <jian.luo4@boschrexroth.de> Signed-off-by: Bin Meng <bmeng.cn@gmail.com> Acked-by: Simon Glass <sjg@chromium.org> 
For starting a Linux console on the superio serial port under
interrupt mode, the IRQ number must be configured.

Signed-off-by: Jian Luo <jian.luo4@boschrexroth.de>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Merge branch 'master' of git://git.denx.de/u-boot-fsl-qoriq 2015-04-24T17:43:24+00:00 Tom Rini trini@konsulko.com 2015-04-24T17:43:24+00:00 3f6dcdb9cd4dbda226a1474f1e9398413e906b41 






armv8/ls2085aqds: NAND boot support
2015-04-23T23:46:50+00:00

Scott Wood
scottwood@freescale.com

2015-03-24T20:25:02+00:00

b2d5ac59859fa946e47fb6ab1f4f3486d4988680

This adds NAND boot support for LS2085AQDS, using SPL framework.
Details of forming NAND image can be found in README.

Signed-off-by: Scott Wood <scottwood@freescale.com>
[York Sun: Remove +S from defconfig after commit 252ed872]
Signed-off-by: York Sun <yorksun@freescale.com>





This adds NAND boot support for LS2085AQDS, using SPL framework.
Details of forming NAND image can be found in README.

Signed-off-by: Scott Wood <scottwood@freescale.com>
[York Sun: Remove +S from defconfig after commit 252ed872]
Signed-off-by: York Sun <yorksun@freescale.com>







driver/fsl_ifc: Add support to finalize CS1, CS3 address binding
2015-04-23T15:55:52+00:00

Prabhakar Kushwaha
prabhakar@freescale.com

2015-03-19T16:20:48+00:00

45bc6fd10819b07b83558d753cf169d9369af823

For fsl-lsch3, IFC is binded with address within 32-bit at fist.
After u-boot relocates to DDR, CS1, CS3 can be binded to higher
address to support large space.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>





For fsl-lsch3, IFC is binded with address within 32-bit at fist.
After u-boot relocates to DDR, CS1, CS3 can be binded to higher
address to support large space.

Signed-off-by: Prabhakar Kushwaha <prabhakar@freescale.com>
Signed-off-by: York Sun <yorksun@freescale.com>







cmd_led: Extend led command to support blinking and more leds
2015-04-23T13:43:08+00:00

Stefan Roese
sr@denx.de

2015-03-11T08:51:39+00:00

a8eeaf2f7a9c3326cba5b1780b1a38f70c6c1f37

This patch extends the U-Boot "led" command to support automatic blinking
by setting a blink frequency in milliseconds. Additionally the number of
supported LEDs is increased to 6 (0...5).

This will be used by the PCA9551 LED driver.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>





This patch extends the U-Boot "led" command to support automatic blinking
by setting a blink frequency in milliseconds. Additionally the number of
supported LEDs is increased to 6 (0...5).

This will be used by the PCA9551 LED driver.

Signed-off-by: Stefan Roese <sr@denx.de>
Reviewed-by: Tom Rini <trini@konsulko.com>







armv8/fsl-lsch3: Add Freescale Debug Server driver
2015-04-21T17:26:29+00:00

Bhupesh Sharma
bhupesh.sharma@freescale.com

2015-03-19T16:20:43+00:00

422cb08acb1bc9a05ffa68ba68b4e196dad1af5b

The Debug Server driver is responsible for loading the Debug
server FW on the Service Processor (Cortex-A5 core) on LS2085A like
SoCs and then polling for the successful initialization of the same.
TOP MEM HIDE is adjusted to ensure the space required by Debug Server
FW is accounted for. MC uses the DDR area which is calculated as:

MC DDR region start = Top of DDR - area reserved by Debug Server FW

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>





The Debug Server driver is responsible for loading the Debug
server FW on the Service Processor (Cortex-A5 core) on LS2085A like
SoCs and then polling for the successful initialization of the same.
TOP MEM HIDE is adjusted to ensure the space required by Debug Server
FW is accounted for. MC uses the DDR area which is calculated as:

MC DDR region start = Top of DDR - area reserved by Debug Server FW

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@freescale.com>
Reviewed-by: York Sun <yorksun@freescale.com>







sandbox: cros_ec: Add Kconfig for sandbox EC config
2015-04-18T17:11:16+00:00

Simon Glass
sjg@chromium.org

2015-03-26T15:29:40+00:00

47cb8c654be8849db9035f3703bbcdd1af21c63e

Move CONFIG_CROS_EC_SANDBOX to Kconfig.

Signed-off-by: Simon Glass <sjg@chromium.org>





Move CONFIG_CROS_EC_SANDBOX to Kconfig.

Signed-off-by: Simon Glass <sjg@chromium.org>







cros_ec: exynos: Match up device tree with kernel version
2015-04-18T17:11:16+00:00

Simon Glass
sjg@chromium.org

2015-03-26T15:29:39+00:00

3fbb78711ca6a80151dc847409f913053bb7d985

The U-Boot device trees are slightly different in a few places. Adjust them
to remove most of the differences. Note that U-Boot does not support the
concept of interrupts as distinct from GPIOs, so this difference remains.

For sandbox, use the same keyboard file as for ARM boards and drop the
host emulation bus which seems redundant.

Signed-off-by: Simon Glass <sjg@chromium.org>





The U-Boot device trees are slightly different in a few places. Adjust them
to remove most of the differences. Note that U-Boot does not support the
concept of interrupts as distinct from GPIOs, so this difference remains.

For sandbox, use the same keyboard file as for ARM boards and drop the
host emulation bus which seems redundant.

Signed-off-by: Simon Glass <sjg@chromium.org>







cros_ec: Drop unused CONFIG_DM_CROS_EC
2015-04-18T17:11:15+00:00

Simon Glass
sjg@chromium.org

2015-03-26T15:29:32+00:00

60f37fc6aaece8dcf0241435d42b0580c93c7b91

Since all supported boards enable this option now, we can remove it along
with the old code.

Signed-off-by: Simon Glass <sjg@chromium.org>





Since all supported boards enable this option now, we can remove it along
with the old code.

Signed-off-by: Simon Glass <sjg@chromium.org>







cros_ec: Reinit the cros_ec device when 'crosec init' is used
2015-04-18T17:11:15+00:00

Simon Glass
sjg@chromium.org

2015-03-26T15:29:31+00:00

e96fc7dfc835b282521c2a661a479f0563c653b5

This command is supposed to reinit the device. At present with driver
model is does nothing. Implement this feature.

Signed-off-by: Simon Glass <sjg@chromium.org>





This command is supposed to reinit the device. At present with driver
model is does nothing. Implement this feature.

Signed-off-by: Simon Glass <sjg@chromium.org>