Add the i.MX6SLL support to OCOTP driver.

The i.MX6SLL reuses the i.MX6ULL fuse, bank 7 and bank8 have 4 words
each, and there is a hole between bank 5 and bank 6.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>

The cros_ec_decode_region() function is only used in combination
with the crosec cmds. Move the function to the correct place.

Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: u-boot@lists.denx.de
Acked-by: Simon Glass <sjg@chromium.org>

Signed-off-by: Tom Rini <trini@konsulko.com>

Conflicts:
	include/configs/ls1021aqds.h
	include/configs/ls1021atwr.h

Move crosec commands from drivers/misc/cros_ec.c to
cmd/cros_ec.c

Acked-by: Simon Glass <sjg@chromium.org>
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Cc: Bin Meng <bmeng.cn@gmail.com>
Cc: Miao Yan <yanmiaobest@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Stefan Roese <sr@denx.de>
Cc: Przemyslaw Marczak <p.marczak@samsung.com>
Cc: Maxime Ripard <maxime.ripard@free-electrons.com>
Cc: Nishanth Menon <nm@ti.com>
Cc: u-boot@lists.denx.de

This commit fixes an issue where data is written to an
invalid memory location.
The issue has been introduced in commit
(88364387 cros: add cros_ec_driver)

Cc: Simon Glass <sjg@chromium.org>
Cc: u-boot@lists.denx.de
Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

Add command to print out the flash info as reported by the
ec. The data read back includes size, write block size,
erase block size.

Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: u-boot@lists.denx.de
Acked-by: Simon Glass <sjg@chromium.org>

Add support for reading back flash parameters as reported by
the ec.

Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: u-boot@lists.denx.de
Acked-by: Simon Glass <sjg@chromium.org>

Boards where ECs that use a I2C port != 0 specify this in the
devicetree file via the google,remote-bus property.
Previously this was ignored and hardcoded to port 0.

Signed-off-by: Moritz Fischer <moritz.fischer@ettus.com>
Cc: Simon Glass <sjg@chromium.org>
Cc: Heiko Schocher <hs@denx.de>
Cc: u-boot@lists.denx.de
Acked-by: Simon Glass <sjg@chromium.org>