u-boot.git/drivers/misc, branch v2021.10 Unnamed repository; edit this file 'description' to name the repository. imx8ulp: move struct mu_type to common header 2021-08-09T12:46:51+00:00 Peng Fan peng.fan@nxp.com 2021-08-07T08:01:09+00:00 4b9423e6f2f7904fe9465d0a3706740c07d9390a Move struct mu_type to common header to make it reusable by upower and S400 Signed-off-by: Peng Fan <peng.fan@nxp.com> 
Move struct mu_type to common header to make it reusable by upower and
S400

Signed-off-by: Peng Fan <peng.fan@nxp.com>
driver: misc: imx8ulp: Add fuse driver for imx8ulp 2021-08-09T12:46:51+00:00 Ye Li ye.li@nxp.com 2021-08-07T08:01:05+00:00 d24c7d54f032bdb26e1d290f82ebd2f7d247d93d This driver uses FSB to read some fuses, but not support program fuse. It only works in SPL (secure mode), u-boot needs traps to ATF to read them. Some fuses can read from S400 API and others are from FSB. Also support program some fuses via S400 API Signed-off-by: Ye Li <ye.li@nxp.com> 
This driver uses FSB to read some fuses, but not support program fuse.
It only works in SPL (secure mode), u-boot needs traps to ATF to
read them.

Some fuses can read from S400 API and others are from FSB.
Also support program some fuses via S400 API

Signed-off-by: Ye Li <ye.li@nxp.com>
arm: imx8ulp: release and configure XRDC at early phase 2021-08-09T12:46:51+00:00 Ye Li ye.li@nxp.com 2021-08-07T08:00:55+00:00 ba472a209b0086cb6e1e573a5e36f0d8ca912b50 Since S400 will set the memory of SPL image to R/X. We can't write to any data in SPL image. 1. Set the parameters save/restore only for u-boot, not for SPL. to avoid write data. 2. Not use MU DM driver but directly call MU API to send release XRDC to S400 at early phase. 3. Configure the SPL image memory of SRAM2 to writable (R/W/X) Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> 
Since S400 will set the memory of SPL image to R/X. We can't write
to any data in SPL image.

1. Set the parameters save/restore only for u-boot, not for SPL. to
   avoid write data.
2. Not use MU DM driver but directly call MU API to send release XRDC
   to S400 at early phase.
3. Configure the SPL image memory of SRAM2 to writable (R/W/X)

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
drivers: misc: s400_api: Update API for fuse read and write 2021-08-09T12:46:51+00:00 Ye Li ye.li@nxp.com 2021-08-07T08:00:54+00:00 26b53212b8f207243e5621d6e121bac559c59678 Add API to support fuse read and write Signed-off-by: Ye Li <ye.li@nxp.com> 
Add API to support fuse read and write

Signed-off-by: Ye Li <ye.li@nxp.com>
drivers: misc: imx8ulp: Update S400 API for release RDC 2021-08-09T12:46:51+00:00 Ye Li ye.li@nxp.com 2021-08-07T08:00:53+00:00 7aeaf4d9a687bcc2b98f3305f2d4e792a9004f70 The RDC API is updated to add a field for XRDC or TRDC Signed-off-by: Ye Li <ye.li@nxp.com> 
The RDC API is updated to add a field for XRDC or TRDC

Signed-off-by: Ye Li <ye.li@nxp.com>
drivers: misc: imx8ulp: Add S400 API for image authentication 2021-08-09T12:46:51+00:00 Ye Li ye.li@nxp.com 2021-08-07T08:00:52+00:00 6306f75d8e498babd7754c1414fc342b0d198b71 Add S400 API for image authentication Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> 
Add S400 API for image authentication

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
drivers: misc: s400_api: Update S400_SUCCESS_IND to 0xd6 2021-08-09T12:46:51+00:00 Ye Li ye.li@nxp.com 2021-08-07T08:00:51+00:00 a6ffde5ea5f65e0b68cdf960d998a381e8a358fd According to latest S400 API doc, the the success indicate value is changed to 0xd6. So update the driver codes. Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Peng Fan <peng.fan@nxp.com> 
According to latest S400 API doc, the the success indicate value is
changed to 0xd6. So update the driver codes.

Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
driver: misc: Add MU and S400 API to communicate with Sentinel 2021-08-09T12:46:50+00:00 Ye Li ye.li@nxp.com 2021-08-07T08:00:41+00:00 0c00d03aca356c295daafe82873ecfc9d7769dd9 Add MU driver and S400 API. Need enable MISC driver to work Signed-off-by: Ye Li <ye.li@nxp.com> 
Add MU driver and S400 API. Need enable MISC driver to work

Signed-off-by: Ye Li <ye.li@nxp.com>
global: Convert simple_strtoul() with hex to hextoul() 2021-08-02T17:32:14+00:00 Simon Glass sjg@chromium.org 2021-07-24T15:03:29+00:00 7e5f460ec457fe310156e399198a41eb0ce1e98c It is a pain to have to specify the value 16 in each call. Add a new hextoul() function and update the code to use it. Add a proper comment to simple_strtoul() while we are here. Signed-off-by: Simon Glass <sjg@chromium.org> 
It is a pain to have to specify the value 16 in each call. Add a new
hextoul() function and update the code to use it.

Add a proper comment to simple_strtoul() while we are here.

Signed-off-by: Simon Glass <sjg@chromium.org>
pci: swap_case: Allow compilation on 32-bit machines 2021-07-28T23:30:22+00:00 Simon Glass sjg@chromium.org 2021-07-18T20:14:23+00:00 05a7cabf5b86fb283c887309746d98e416edcc64 At present this driver assumes that ulong is 64-bits long. On 32-bit machines it is not. Use the 64-bit code only on 64-bit machines. This makes things work correctly on 32-bit machines. Signed-off-by: Simon Glass <sjg@chromium.org> 
At present this driver assumes that ulong is 64-bits long. On 32-bit
machines it is not. Use the 64-bit code only on 64-bit machines.

This makes things work correctly on 32-bit machines.

Signed-off-by: Simon Glass <sjg@chromium.org>