Move imx8 sci header file to include/firmware/imx, then we could
use build macro to reuse some i.MX8 drivers for i.MX9, such as
drivers/cpu/imx8_cpu.c.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Stefano Babic <sbabic@denx.de>

ESM MCU masks must be set to 0h so that PMIC can handle errors
that require attention for example SYS_SAFETY_ERRn. The required bits
must be cleared: ESM_MCU_RST_MASK, ESM_MCU_FAIL_MASK, ESM_MCU_PIN_MASK.

If PMIC expected to handle errors, make sure EVM is configured to
connect SOC_SAFETY_ERRz (Main) to the PMIC.

Note that even though the User Guide for TPS65941 for J721E mentions
that these bits are reset to 0h; it is not reflected once board boots to
kernel, possibly due to NVM configurations. Eithercase, it is best to
account for this from R5 SPL side as well.

Signed-off-by: Neha Malcom Francis <n-francis@ti.com>

This change adds a Qualcomm GENI SE QUP device driver as a wrapper for
actually enabled and used serial devices found on a board.

At the moment the driver is pretty simple, its intention is to populate
childred devices and provide I/O mem read interface to them as clients,
this is needed for GENI UART driver to set up a proper clock divider
and provide the actually asked baud rate.

Signed-off-by: Vladimir Zapolskiy <vladimir.zapolskiy@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>

The documentation for misc_read() says:

    Return: number of bytes read if OK (may be 0 if EOF), -ve on error

The Rockchip efuse driver implements this so it should return the number
of bytes read rather than zero on success.  Fix this so that the driver
follows the usual contract for read operations.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

The documentation for misc_read() says:

    Return: number of bytes read if OK (may be 0 if EOF), -ve on error

The Rockchip efuse driver implements this so it should return the number
of bytes read rather than zero on success.  Fix this so that the driver
follows the usual contract for read operations.

Reviewed-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: John Keeping <john@metanate.com>
Reviewed-by: Kever Yang <kever.yang@rock-chips.com>

The DM_REGULATOR symbol has SPL counterpart in:
  drivers/power/regulator/Kconfig:config SPL_DM_REGULATOR
Use CONFIG_IS_ENABLED() macro to match on the correct
variant depending on the build stage.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Simon Glass <sjg@chromium.org>

u-boot-imx-next-20230331 for next
---------------------------------

CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/15819

i.MX patches queued for next:

- Conversions to DM_SERIAL
- Fixes for Toradex boards
- Gateworks Boards
- i.MX8ULP
- EQoS support / fixes, changes in boards

Reports the sandbox swapcase PCI Express device to support a 256 byte
Maximum Payload Size for MPS tuning tests.

Signed-off-by: Stephen Carlson <stcarlso@linux.microsoft.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

The ocotp driver is available for regular and SPL builds using the
(SPL_)MXC_OCOTP configuration. Also, the ocotp driver does not support
the driver model (DM) configuration.

But, for SPL builds, the SPL_MXC_OCOTP configuration depends on
SPL_MISC which implies on SPL_DM.

This commit replaces the dependency on SPL_MISC with SPL_DRIVERS_MISC.
So the only requirement is to have enabled miscellaneous drivers for
the SPL.

Signed-off-by: Jean-Marie Lemetayer <j.lemetayer@kerlink.fr>

Remove legacy command definitions, change to use new ELE_xxx command
request.

Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Peng Fan <peng.fan@nxp.com>