<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/drivers/misc, branch v2025.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>Merge patch series "Implement ACPI on aarch64"</title>
<updated>2024-10-28T00:44:13+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2024-10-27T23:14:22+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=2800aecce08b47b169d8e9824dd23b1297b2cedc'/>
<id>2800aecce08b47b169d8e9824dd23b1297b2cedc</id>
<content type='text'>
Patrick Rudolph &lt;patrick.rudolph@9elements.com&gt; says:

Based on the existing work done by Simon Glass this series adds
support for booting aarch64 devices using ACPI only.
As first target QEMU SBSA support is added, which relies on ACPI
only to boot an OS. As secondary target the Raspberry Pi4 was used,
which is broadly available and allows easy testing of the proposed
solution.

The series is split into ACPI cleanups and code movements, adding
Arm specific ACPI tables and finally SoC and mainboard related
changes to boot a Linux on the QEMU SBSA and RPi4. Currently only the
mandatory ACPI tables are supported, allowing to boot into Linux
without errors.

The QEMU SBSA support is feature complete and provides the same
functionality as the EDK2 implementation.

The changes were tested on real hardware as well on QEMU v9.0:

qemu-system-aarch64 -machine sbsa-ref -nographic -cpu cortex-a57 \
                    -pflash secure-world.rom \
                    -pflash unsecure-world.rom

qemu-system-aarch64 -machine raspi4b -kernel u-boot.bin -cpu cortex-a72 \
-smp 4 -m 2G -drive file=raspbian.img,format=raw,index=0 \
-dtb bcm2711-rpi-4-b.dtb -nographic

Tested against FWTS V24.03.00.

Known issues:
- The QEMU rpi4 support is currently limited as it doesn't emulate PCI,
  USB or ethernet devices!
- The SMP bringup doesn't work on RPi4, but works in QEMU (Possibly
  cache related).
- PCI on RPI4 isn't working on real hardware since the pcie_brcmstb
  Linux kernel module doesn't support ACPI yet.

Link: https://lore.kernel.org/r/20241023132116.970117-1-patrick.rudolph@9elements.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Patrick Rudolph &lt;patrick.rudolph@9elements.com&gt; says:

Based on the existing work done by Simon Glass this series adds
support for booting aarch64 devices using ACPI only.
As first target QEMU SBSA support is added, which relies on ACPI
only to boot an OS. As secondary target the Raspberry Pi4 was used,
which is broadly available and allows easy testing of the proposed
solution.

The series is split into ACPI cleanups and code movements, adding
Arm specific ACPI tables and finally SoC and mainboard related
changes to boot a Linux on the QEMU SBSA and RPi4. Currently only the
mandatory ACPI tables are supported, allowing to boot into Linux
without errors.

The QEMU SBSA support is feature complete and provides the same
functionality as the EDK2 implementation.

The changes were tested on real hardware as well on QEMU v9.0:

qemu-system-aarch64 -machine sbsa-ref -nographic -cpu cortex-a57 \
                    -pflash secure-world.rom \
                    -pflash unsecure-world.rom

qemu-system-aarch64 -machine raspi4b -kernel u-boot.bin -cpu cortex-a72 \
-smp 4 -m 2G -drive file=raspbian.img,format=raw,index=0 \
-dtb bcm2711-rpi-4-b.dtb -nographic

Tested against FWTS V24.03.00.

Known issues:
- The QEMU rpi4 support is currently limited as it doesn't emulate PCI,
  USB or ethernet devices!
- The SMP bringup doesn't work on RPi4, but works in QEMU (Possibly
  cache related).
- PCI on RPI4 isn't working on real hardware since the pcie_brcmstb
  Linux kernel module doesn't support ACPI yet.

Link: https://lore.kernel.org/r/20241023132116.970117-1-patrick.rudolph@9elements.com
</pre>
</div>
</content>
</entry>
<entry>
<title>drivers: misc: irq-uclass: Update irq_get_by_index</title>
<updated>2024-10-27T23:24:13+00:00</updated>
<author>
<name>Patrick Rudolph</name>
<email>patrick.rudolph@9elements.com</email>
</author>
<published>2024-10-23T13:20:05+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f116feadea7be9afe412c25779dfcf241c121715'/>
<id>f116feadea7be9afe412c25779dfcf241c121715</id>
<content type='text'>
Support reading the "interrupts" property from the devicetree in case
the "interrupts-extended" property isn't found. As the "interrupts"
property is commonly used, this allows to parse all existing FDT and
makes irq_get_by_index() more useful.

The "interrupts" property doesn't contain a phandle as "interrupts-extended"
does, so implement a new method to locate the interrupt-parent called
irq_get_interrupt_parent().

TEST: Read the interrupts from the GIC node for ACPI MADT generation.

Signed-off-by: Patrick Rudolph &lt;patrick.rudolph@9elements.com&gt;
Reviewed-by: Moritz Fischer &lt;moritzf@google.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Support reading the "interrupts" property from the devicetree in case
the "interrupts-extended" property isn't found. As the "interrupts"
property is commonly used, this allows to parse all existing FDT and
makes irq_get_by_index() more useful.

The "interrupts" property doesn't contain a phandle as "interrupts-extended"
does, so implement a new method to locate the interrupt-parent called
irq_get_interrupt_parent().

TEST: Read the interrupts from the GIC node for ACPI MADT generation.

Signed-off-by: Patrick Rudolph &lt;patrick.rudolph@9elements.com&gt;
Reviewed-by: Moritz Fischer &lt;moritzf@google.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge patch series "Add AVS support for J721S2"</title>
<updated>2024-10-21T23:52:40+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2024-10-21T23:52:40+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=63a3dbb7b9e1c352c85b4fa6508f1c895e163458'/>
<id>63a3dbb7b9e1c352c85b4fa6508f1c895e163458</id>
<content type='text'>
Manorit Chawdhry &lt;m-chawdhry@ti.com&gt; says:

This series adds support for Adaptive voltage scaling on J721S2 device [0].

[0]: https://www.ti.com/lit/pdf/spruj28 (Section 5.2.4.1 AVS Support)

AVS Test for J721S2: https://gist.github.com/manorit2001/b2fd9f6764a863294d4aa0755c83c84f
Boot Test results: https://gist.github.com/manorit2001/d44e035552cb19aadeb0d928d5cb5f26

Link: https://lore.kernel.org/r/20241015-b4-upstream-j721s2-avs-v5-0-5c8087387dc5@ti.com
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Manorit Chawdhry &lt;m-chawdhry@ti.com&gt; says:

This series adds support for Adaptive voltage scaling on J721S2 device [0].

[0]: https://www.ti.com/lit/pdf/spruj28 (Section 5.2.4.1 AVS Support)

AVS Test for J721S2: https://gist.github.com/manorit2001/b2fd9f6764a863294d4aa0755c83c84f
Boot Test results: https://gist.github.com/manorit2001/d44e035552cb19aadeb0d928d5cb5f26

Link: https://lore.kernel.org/r/20241015-b4-upstream-j721s2-avs-v5-0-5c8087387dc5@ti.com
</pre>
</div>
</content>
</entry>
<entry>
<title>drivers: misc: k3_avs: Extract MPU clk and dev ID from DT</title>
<updated>2024-10-21T23:52:31+00:00</updated>
<author>
<name>Manorit Chawdhry</name>
<email>m-chawdhry@ti.com</email>
</author>
<published>2024-10-15T10:52:20+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=96ef1f227dc3268fe15a8fc5308157848c30f0d5'/>
<id>96ef1f227dc3268fe15a8fc5308157848c30f0d5</id>
<content type='text'>
Different devices have different MPU clk and dev ID. Currently it had
been hardcoded. Move it to DT based extraction.

Signed-off-by: Manorit Chawdhry &lt;m-chawdhry@ti.com&gt;
Reviewed-by: Aniket Limaye &lt;a-limaye@ti.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Different devices have different MPU clk and dev ID. Currently it had
been hardcoded. Move it to DT based extraction.

Signed-off-by: Manorit Chawdhry &lt;m-chawdhry@ti.com&gt;
Reviewed-by: Aniket Limaye &lt;a-limaye@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>drivers: misc: k3_avs: Check return code while programming AVS</title>
<updated>2024-10-21T23:52:31+00:00</updated>
<author>
<name>Manorit Chawdhry</name>
<email>m-chawdhry@ti.com</email>
</author>
<published>2024-10-15T10:52:18+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c530cd4fa1356dee96047e8e605a20348f6d2eaa'/>
<id>c530cd4fa1356dee96047e8e605a20348f6d2eaa</id>
<content type='text'>
Check if AVS could not be programmed and print a warning.

Fixes: 9d233b4e3ed6 ("misc: k3_avs: add driver for K3 Adaptive Voltage Scaling Class 0")
Reviewed-by: Udit Kumar &lt;u-kumar1@ti.com&gt;
Signed-off-by: Manorit Chawdhry &lt;m-chawdhry@ti.com&gt;
Reviewed-by: Aniket Limaye &lt;a-limaye@ti.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Check if AVS could not be programmed and print a warning.

Fixes: 9d233b4e3ed6 ("misc: k3_avs: add driver for K3 Adaptive Voltage Scaling Class 0")
Reviewed-by: Udit Kumar &lt;u-kumar1@ti.com&gt;
Signed-off-by: Manorit Chawdhry &lt;m-chawdhry@ti.com&gt;
Reviewed-by: Aniket Limaye &lt;a-limaye@ti.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>misc: fuse: Update fuse driver</title>
<updated>2024-10-13T12:43:05+00:00</updated>
<author>
<name>Ye Li</name>
<email>ye.li@nxp.com</email>
</author>
<published>2024-10-06T00:30:05+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6f446ccc1f28859ee5d39b6dc5638130b912bd43'/>
<id>6f446ccc1f28859ee5d39b6dc5638130b912bd43</id>
<content type='text'>
When OSCCA is enabled, FSB fuse shadow (offset 0x8000)
access is disabled for SOC. So update the driver to read fuse
from ELE API. The ELE has supported to read all shadow fuses like
FSB, reuse the table of FSB for the word index used by ELE API.

Add ELE shadow fuse read and write to current ELE fuse driver.
But when LC is OEM closed, the ELE read/write shadow fuse APIs are
forbidden. Reading from any fuse will return error. This causes
problem to u-boot which must read out some fuse no matter whatever LC.
So we have to change back to read from FSB and ELE common fuse read API.
For using ELE shadow read API for development purpose like checking
the ELE shadow fuse write result, user can set env variable
"enable_ele_shd" to y to switch it.

Reviewed-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When OSCCA is enabled, FSB fuse shadow (offset 0x8000)
access is disabled for SOC. So update the driver to read fuse
from ELE API. The ELE has supported to read all shadow fuses like
FSB, reuse the table of FSB for the word index used by ELE API.

Add ELE shadow fuse read and write to current ELE fuse driver.
But when LC is OEM closed, the ELE read/write shadow fuse APIs are
forbidden. Reading from any fuse will return error. This causes
problem to u-boot which must read out some fuse no matter whatever LC.
So we have to change back to read from FSB and ELE common fuse read API.
For using ELE shadow read API for development purpose like checking
the ELE shadow fuse write result, user can set env variable
"enable_ele_shd" to y to switch it.

Reviewed-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>misc: fuse: Fix FSB redundancy fuse word check and clear res</title>
<updated>2024-10-13T12:43:05+00:00</updated>
<author>
<name>Ye Li</name>
<email>ye.li@nxp.com</email>
</author>
<published>2024-10-06T00:30:04+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b1fc93b95effbac073bc5b5bc6544ebd590241f7'/>
<id>b1fc93b95effbac073bc5b5bc6544ebd590241f7</id>
<content type='text'>
There is a bug when checking fuse word with redundancy fuse in FSB
table. The redundancy fuses are combined into 4 words, so we can't
directly use word index to do the check, otherwise the high 4 words
will fail to match.

And When calling ELE API, res parameter will pass to ELE API to get ELE
response value for failure. So most of usage does not initialize
this variable and print it after calling ELE API.
However, when ELE API returns failure, we can't ensure this res is
always set because there may be other failure like MU failure.

Reviewed-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
There is a bug when checking fuse word with redundancy fuse in FSB
table. The redundancy fuses are combined into 4 words, so we can't
directly use word index to do the check, otherwise the high 4 words
will fail to match.

And When calling ELE API, res parameter will pass to ELE API to get ELE
response value for failure. So most of usage does not initialize
this variable and print it after calling ELE API.
However, when ELE API returns failure, we can't ensure this res is
always set because there may be other failure like MU failure.

Reviewed-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>misc: ele_api: Add read/write shadow fuse APIs</title>
<updated>2024-10-13T12:43:05+00:00</updated>
<author>
<name>Ye Li</name>
<email>ye.li@nxp.com</email>
</author>
<published>2024-10-06T00:30:03+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e6bdb8dfdef414c4402ef8832666f9d315554492'/>
<id>e6bdb8dfdef414c4402ef8832666f9d315554492</id>
<content type='text'>
Add ELE APIs to support read and write shadow fuses

Reviewed-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add ELE APIs to support read and write shadow fuses

Reviewed-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>misc: ele_api: Update ELE read common fuse API</title>
<updated>2024-10-13T12:43:05+00:00</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2024-10-06T00:30:02+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=929dc83b73b71fd638b48b26a2652fd45e963448'/>
<id>929dc83b73b71fd638b48b26a2652fd45e963448</id>
<content type='text'>
On iMX8ULP, the word index 1 is used to read OTP_UNIQ_ID with 4 words
data responsed. However this special index does not apply others.
So restrict the check to i.MX8ULP to avoid problem when reading from
fuse word 1 for others, such as i.MX93.

Also update header order

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
On iMX8ULP, the word index 1 is used to read OTP_UNIQ_ID with 4 words
data responsed. However this special index does not apply others.
So restrict the check to i.MX8ULP to avoid problem when reading from
fuse word 1 for others, such as i.MX93.

Also update header order

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>misc: ele_mu: Clear RR when initialize MU</title>
<updated>2024-10-13T12:43:05+00:00</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2024-10-06T00:22:51+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e7431340743962b4cfaffda95016c55bd2df297a'/>
<id>e7431340743962b4cfaffda95016c55bd2df297a</id>
<content type='text'>
When OS is doing ELE API call, before OS get the response, OS is force
reseted, then it is possible that MU RR has data during initialization
in SPL stage. So clear the RR registers, otherwise SPL ELE API call will
work abnormal.

Cc: Alice Guo &lt;alice.guo@nxp.com&gt;
Cc: Marek Vasut &lt;marex@denx.de&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
When OS is doing ELE API call, before OS get the response, OS is force
reseted, then it is possible that MU RR has data during initialization
in SPL stage. So clear the RR registers, otherwise SPL ELE API call will
work abnormal.

Cc: Alice Guo &lt;alice.guo@nxp.com&gt;
Cc: Marek Vasut &lt;marex@denx.de&gt;
Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
