u-boot.git/drivers/mmc, branch main

mmc: sdhci: Use CONFIG_IS_ENABLED for MMC_IO_VOLTAGE

2026-07-12T08:18:32Z

Use CONFIG_IS_ENABLED() instead of IS_ENABLED() when checking the MMC_IO_VOLTAGE symbol so the Kconfig option is evaluated correctly for xPL builds. Signed-off-by: Jonas Karlman Reviewed-by: Peng Fan Signed-off-by: Peng Fan

mmc: dw_mmc: Allow use of in-spec voltage range for vqmmc-supply

2026-07-12T08:18:32Z

The Rockchip RK3399 SoC SDMMC IO domain supports 1.8V and 3.0V mode, and the 3.0V mode is within SD Standards allowed 2.7V-3.6V range. However, the commit 0b75109b6aaf ("mmc: dw_mmc: return error for invalid voltage setting") help enforce strict 1.8V and 3.3V when setting vqmmc-supply making mmc_set_signal_voltage() now fail for MMC_SIGNAL_VOLTAGE_330 and leading to an improper switch to MMC_SIGNAL_VOLTAGE_180. Use regulator_set_value_clamp() to set an SD Standards voltage range, 1.70V-1.95V and 2.7V-3.6V, I/O voltage instead of requiring an exact regulator value to closer match Linux and to fix use of 3.3V signal voltage on Rockchip RK3399 boards using MMC_IO_VOLTAGE=y. Fixes: 0b75109b6aaf ("mmc: dw_mmc: return error for invalid voltage setting") Signed-off-by: Jonas Karlman Reviewed-by: Peng Fan Signed-off-by: Peng Fan

treewide: Kconfig: use bool instead of tristate

2026-07-10T21:45:57Z

U-Boot does not support modules, so having tristate options is useless. Therefore this patch does a blind replace of all tristate options to bool tree-wide. Signed-off-by: Anshul Dalal Reviewed-by: Heiko Schocher Reviewed-by: Quentin Schulz Reviewed-by: Siddharth Vadapalli Reviewed-by: Neha Malcom Francis Reviewed-by: Romain Gantois Reviewed-by: Simon Glass

Merge branch 'next'

2026-07-07T00:26:12Z

Revert "mmc: sdhci-cadence: trigger tuning for SD HS mode on SD6HC (v6) PHY"

2026-07-06T06:06:27Z

This reverts commit b42c67188c14 ("mmc: sdhci-cadence: trigger tuning for SD HS mode on SD6HC (v6) PHY"). The reverted patch introduced several issues: 1. Non-standard tuning trigger: The SD Physical Layer Specification only mandates execute_tuning for SDR50 and SDR104 UHS-I modes. Triggering tuning for SD High Speed mode is outside the spec and is handled via a non-standard set_ios_post callback rather than through the established SDHCI framework tuning path. 2. Non-standard device tree property: The patch introduced a new "cdns,sd-hs-tuning" DT property to opt into SD HS tuning. This is not aligned with existing DT bindings and bypasses the standard MMC capability negotiation mechanism. 3. Incorrect tunable mode allowlist: The sdhci_cdns6_mode_is_tuned() function includes SD_HS, UHS_SDR50, and MMC_HS_400_ES as tunable modes. According to the Cadence SD6HC IP User Guide (section 7.5.2, Figure 18), tuning is only required for UHS-I SDR104 (SD) and HS200 (eMMC). SD High Speed, UHS-I SDR50, and DDR50 only require a PHY settings update from the pre-calculation script, not the tuning procedure. HS400 transitions through HS200 and reuses its tuned DLL value with a partial settings update. HS400ES only requires a plain settings update from the calculation script with no dependency on HS200 tuning. 4. Tuned state management outside the framework: The patch manually tracks tuned DLL state (tuned_mode, tuned_dll_slave_ctrl) and restores it across PHY reconfigurations. This duplicates responsibility that belongs in the core MMC tuning framework and adds unnecessary complexity to the driver. Reverting to realign the driver with the IP documentation and the SD Physical Layer Specification. Signed-off-by: Tanmay Kathpalia Signed-off-by: Peng Fan

mmc: sd: fix redundant 1.8V voltage switch on cold boot with UHS card

2026-07-06T06:06:08Z

When a UHS card successfully negotiates 1.8V signaling during normal initialization, the host voltage switch is performed as part of the ACMD41 handshake. Without this fix, the warm-reboot recovery path would fire again immediately after, switching the host voltage a second time unnecessarily. Add a check so the recovery path is only entered when the voltage switch was not already performed during the current initialization session. Fixes: 906ee6785b1c ("mmc: sd: Handle UHS-I voltage signaling without power cycle") Signed-off-by: Tanmay Kathpalia Signed-off-by: Peng Fan

treewide: Staticize and constify acpi ops

2026-06-29T21:29:44Z

Set the acpi_ops structure as static const where applicable. The The structure is not accessible from outside of drivers and is not going to be modified at runtime. The structure may be unused in a couple of drivers depending on their configuration, mark those sites with __maybe_unused . Signed-off-by: Marek Vasut Reviewed-by: Simon Glass

Kconfig: drivers: restyle remaining

2026-06-25T21:00:58Z

Restyle all Kconfigs for the rest of "drivers": Menu entries : no space left Menu attributes: 1 TAB Help text : 1 TAB + 2 spaces Replace '---help---' by 'help' Signed-off-by: Johan Jonker [trini: Add missing indentation on a few more multi-paragraph help texts] Signed-off-by: Tom Rini

treewide: move bi_dram[] from bd to gd

2026-06-25T00:13:24Z

Currently, the bi_dram[] information is stored in the board info structure (bd). Because bd is only valid after reserve_board(), dram_init_banksize() must be called late in the initialization process. This limitation is problematic, as it forces us to rely on a variety of bespoke functions to determine board RAM, bank memory sizes, and other early setup requirements. By moving bi_dram[] into the global data (gd), we can run it earlier. This is particularly convenient since boards define their own dram_init_banksize() routines, which do not always rely on parsing Device Tree (DT) memory nodes. Additionally, U-Boot defaults to relocating to the top of the first memory bank. While boards currently use custom functions to override this behavior, having the DRAM bank information available earlier in gd makes relocating to a different bank trivial and standardizes the process. Reviewed-by: Anshul Dalal Tested-by: Michal Simek # Versal Gen 2 Vek385 Tested-by: Anshul Dalal Reviewed-by: Simon Glass Signed-off-by: Ilias Apalodimas Tested-by: Christophe Leroy (CS GROUP)

mmc: mtk-sd: select LMB_LIMIT_DMA_BELOW_RAM_TOP

2026-06-24T15:06:16Z

Default to CONFIG_LMB_LIMIT_DMA_BELOW_RAM_TOP=y when CONFIG_MTK_SD is enabled. The MediaTek SD controller can only access the first 4GB of RAM when DMA is used. "imply" is used rather than "select" in case someone want's to turn off the option when DMA is not used. Link: https://patch.msgid.link/20260615-mtk-fix-ram-size-v2-1-f72cfc52ce58@baylibre.com Signed-off-by: David Lechner