u-boot.git/drivers/mmc, branch v2011.03-rc1

Minor Coding Style Cleanup.

2011-02-02T21:36:10Z

Signed-off-by: Wolfgang Denk

Davinci MMCSD Support

2011-02-01T23:54:44Z

Added support for MMC/SD cards for Davinci. This feature is enabled by CONFIG_DAVINCI_MMC and is dependant on CONFIG_MMC and CONFIG_GENERIC_MMC options. This is tested on DM355 and DM365 EVMs with both the available mmc controllers. Signed-off-by: Alagu Sankar Signed-off-by: Sandeep Paulraj

fsl_esdhc: Add the workaround for erratum ESDHC135 (enable on P4080)

2011-01-14T07:32:22Z

The default value of the SRS, VS18 and VS30 and ADMAS fields in the host controller capabilities register (HOSTCAPBLT) are incorrect. The default of these bits should be zero instead of one. Clear these bits out when we read HOSTCAPBLT. Signed-off-by: Roy Zang Signed-off-by: Kumar Gala

fsl_esdhc: Add the workaround for erratum ESDHC111 (enable on P4080)

2011-01-14T07:32:22Z

Do not issue a manual asynchronous CMD12. Instead, use a (software) synchronous CMD12 or AUTOCMD12 to abort data transfer. Signed-off-by: Jerry Huang Signed-off-by: Roy Zang Signed-off-by: Kumar Gala

fsl_esdhc: Fix esdhc disabled problem on some platforms

2011-01-14T07:32:19Z

Some new platform's esdhc pins don't share with other function. The eSDHC shouldn't be disabled, even if "esdhc" isn't defined in hwconfig env variable. Use CONFIG_FSL_ESDHC_PIN_MUX to fix this problem. Signed-off-by: Chenhui Zhao Signed-off-by: Li Yang Signed-off-by: Kumar Gala

fsl_esdhc: Fix the voltage validation process

2010-12-18T22:15:24Z

The current code use all the voltage range support by the host controller to do the validation. This will cause problem when the host supports Low Voltage Range. Change the validation voltage to be based on board setup. Signed-off-by: Li Yang Tested-by: Stefano Babic Signed-off-by: Kumar Gala

fsl_esdhc: Fix max clock frequency

2010-12-18T22:15:24Z

The max clock of MMC is 52MHz Signed-off-by: Jerry Huang Tested-by: Stefano Babic Signed-off-by: Kumar Gala

fsl_esdhc: Use mmc_set_clock to set initial speed

2010-12-18T22:15:21Z

After booting the u-boot, and first using some SD card (such as Sandisk 2G SD card), because the field 'clock' of struct mmc is zero, this will cause the read transfer is always active and SDHC DATA line is always active, therefore, driver can't handle the next command. Therefore, we use mmc_set_clock to setup both the data structure and HW to the initial clock speed of 400000Hz. Signed-off-by: Jerry Huang Tested-by: Stefano Babic Signed-off-by: Kumar Gala

fsl_esdhc: Set the eSHDC DMACTL[SNOOP] bit after resetting the controller

2010-12-13T15:32:16Z

eSDHC host controller reset results in clearing of snoop bit also. This patch sets the SNOOP bit after the completion of host controller reset. Without this patch mmc reads are not consistent. Signed-off-by: P.V.Suresh Signed-off-by: Kumar Gala

AT91: gen_atmel_mci.c: fix bug when Slot B is used

2010-12-07T15:36:39Z

Signed-off-by: Reinhard Meyer