u-boot.git/drivers/mmc, branch v2018.01 Unnamed repository; edit this file 'description' to name the repository. mmc: uniphier-sd: Add R8A77995 D3 compatible 2017-12-09T12:36:26+00:00 Marek Vasut marek.vasut+renesas@gmail.com 2017-10-21T09:33:20+00:00 af098530e5abe424df99e8bc454353bce80cc696 Add new compatible to the Uniphier SD driver for R8A77995 D3 SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 
Add new compatible to the Uniphier SD driver for R8A77995 D3 SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
mmc: uniphier-sd: Add R8A77970 V3M compatible 2017-12-09T12:36:26+00:00 Marek Vasut marek.vasut+renesas@gmail.com 2017-10-21T09:31:57+00:00 6ba2382f426fb8d7d6e3ca13ae0a74f4386d8d20 Add new compatible to the Uniphier SD driver for R8A77970 V3M SoC. Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com> Cc: Masahiro Yamada <yamada.masahiro@socionext.com> Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org> 
Add new compatible to the Uniphier SD driver for R8A77970 V3M SoC.

Signed-off-by: Marek Vasut <marek.vasut+renesas@gmail.com>
Cc: Masahiro Yamada <yamada.masahiro@socionext.com>
Cc: Nobuhiro Iwamatsu <iwamatsu@nigauri.org>
mmc: atmel_sdhci: not on capabilities to set gck rate 2017-11-30T03:30:50+00:00 Ludovic Desroches ludovic.desroches@microchip.com 2017-11-17T06:51:27+00:00 327713a64a4dd71758c44ba9b86cab5c5379274f The capabilities have default values which doesn't reflect the reality when it concerns the base clock and the mul value. Use a fixe rate for the gck. 240 MHz is an arbitrary choice, it is a multiple of the maximum SD clock frequency handle by the controller and it allows to get a 400 kHz clock for the card initialisation. Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com> Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com> 
The capabilities have default values which doesn't reflect the reality
when it concerns the base clock and the mul value. Use a fixe rate
for the gck. 240 MHz is an arbitrary choice, it is a multiple of the
maximum SD clock frequency handle by the controller and it allows to
get a 400 kHz clock for the card initialisation.

Signed-off-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Wenyou Yang <wenyou.yang@microchip.com>
nds32: ftsdc010: Fix SD detech fail on AE3XX. 2017-11-30T02:04:36+00:00 Rick Chen rick@andestech.com 2017-08-25T06:03:00+00:00 73cd56b2df213c629191139e5c6705e069b6214f AE3XX can not support SD high-speed mode. SW can work-around by removing HS capibility. Signed-off-by: Rick Chen <rick@andestech.com> 
AE3XX can not support SD high-speed mode.
SW can work-around by removing HS capibility.

Signed-off-by: Rick Chen <rick@andestech.com>
nds32: ftsdc010: fix wait status error coding. 2017-11-30T02:04:30+00:00 Rick Chen rick@andestech.com 2017-08-25T06:02:13+00:00 1a9db640b4f5f8070d75a5baf794678625b4f9a0 Bit of DATA_END and DATA_CRC_OK shall be checked for returning pass or fail of a request. Signed-off-by: Rick Chen <rick@andestech.com> 
Bit of DATA_END and DATA_CRC_OK shall be checked for
returning pass or fail of a request.

Signed-off-by: Rick Chen <rick@andestech.com>
nds32: ftsdc010: Support ftsdc010 DM. 2017-11-30T02:01:50+00:00 Rick Chen rick@andestech.com 2017-08-28T08:44:11+00:00 252185f22470d3bf828c7e989dfa06b83bb2e572 ftsdc010 support device tree flow. Signed-off-by: Rick Chen <rick@andestech.com> 
ftsdc010 support device tree flow.

Signed-off-by: Rick Chen <rick@andestech.com>
nds32: mmc: Support ftsdc010 DM. 2017-11-30T01:59:09+00:00 Rick Chen rick@andestech.com 2017-11-14T06:47:09+00:00 9f678ab139cd6ef0ab98759d63f1cee0fa534b66 Add nds32_mmc to support ftsdc010 dm flow. Signed-off-by: Rick Chen <rick@andestech.com> 
Add nds32_mmc to support ftsdc010 dm flow.

Signed-off-by: Rick Chen <rick@andestech.com>
mmc: arm_pl180_mmci: add .getcd callback 2017-11-17T12:44:13+00:00 Patrice Chotard patrice.chotard@st.com 2017-10-23T08:57:34+00:00 5829fe2d59d8c088dadc43dedb36a657d791970c Add .getcd callback to check is MMC card is present Signed-off-by: Patrice Chotard <patrice.chotard@st.com> 
Add .getcd callback to check is MMC card is present

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
mmc: arm_pl180_mmci: add clock support 2017-11-17T12:44:13+00:00 Patrice Chotard patrice.chotard@st.com 2017-10-23T08:57:33+00:00 5f256fe71dd064063f8390926922085c2c7c14fc Allow to get and enable MMC related clock Signed-off-by: Patrice Chotard <patrice.chotard@st.com> 
Allow to get and enable MMC related clock

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>
mmc: arm_pl180_mmci: add bus_width DT property support 2017-11-17T12:44:13+00:00 Patrice Chotard patrice.chotard@st.com 2017-10-23T08:57:32+00:00 9035bb7432d33014fd131390c635e634aaacd4d0 Allow to get "bus-width" property from device tree Signed-off-by: Patrice Chotard <patrice.chotard@st.com> 
Allow to get "bus-width" property from device tree

Signed-off-by: Patrice Chotard <patrice.chotard@st.com>