u-boot.git/drivers/mmc, branch v2018.05 Unnamed repository; edit this file 'description' to name the repository. SPDX: Convert all of our single license tags to Linux Kernel style 2018-05-07T13:34:12+00:00 Tom Rini trini@konsulko.com 2018-05-06T21:58:06+00:00 83d290c56fab2d38cd1ab4c4cc7099559c1d5046 When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini <trini@konsulko.com> 
When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini <trini@konsulko.com>
mmc: zynq_sdhci: use correct quirk if CONFIG_ZYNQ_HISPD_BROKEN is defined 2018-05-02T01:57:43+00:00 Hannes Schmelzer hannes.schmelzer@br-automation.com 2018-03-07T07:00:57+00:00 4781921630f9f2dd1165cc1e79494893e8e9bd3c The 'SDHCI_QUIRK_NO_HISPD_BIT' is used wrong here. The purpose of this quirk is to tell the sdhci-driver that the IP-core doesn't have a "high- speed-enable" bit in its registers. With this commit we change this to the correct quirk: SDHCI_QUIRK_BROKEN_HISPD_MODE Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com> 
The 'SDHCI_QUIRK_NO_HISPD_BIT' is used wrong here. The purpose of this
quirk is to tell the sdhci-driver that the IP-core doesn't have a "high-
speed-enable" bit in its registers.

With this commit we change this to the correct quirk:
SDHCI_QUIRK_BROKEN_HISPD_MODE

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
mmc: sdhci: add SDHCI_QUIRK_BROKEN_HISPD_MODE 2018-05-02T01:57:43+00:00 Hannes Schmelzer oe5hpm@oevsv.at 2018-03-07T07:00:56+00:00 88a57125fa689f3207c5409ef6eeb6a47ff051cd Some IP-core implementations of the SDHCI have different troubles on the silicon where they are placed. On ZYNQ platform for example Xilinx doesn't accept the hold timing of an eMMC chip which operates in High-Speed mode and must be forced to operate in non high-speed mode. To get rid of this "SDHCI_QUIRK_BROKEN_HISPD_MODE" is introduced. For more details about this refer to the Xilinx answer-recor #59999 https://www.xilinx.com/support/answers/59999.html This commit: - doesn't set HISPD bit on the host-conroller - reflects this fact within the host-controller capabilities Upon this the layer above (mmc-driver) can setup the card correctly. Otherwise the MMC card will be switched into high-speed mode and causes possible timing violation on the host-controller side. Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at> Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com> 
Some IP-core implementations of the SDHCI have different troubles on the
silicon where they are placed.

On ZYNQ platform for example Xilinx doesn't accept the hold timing of an
eMMC chip which operates in High-Speed mode and must be forced to
operate in non high-speed mode. To get rid of this
"SDHCI_QUIRK_BROKEN_HISPD_MODE" is introduced.

For more details about this refer to the Xilinx answer-recor #59999
https://www.xilinx.com/support/answers/59999.html

This commit:
- doesn't set HISPD bit on the host-conroller
- reflects this fact within the host-controller capabilities

Upon this the layer above (mmc-driver) can setup the card correctly.

Otherwise the MMC card will be switched into high-speed mode and causes
possible timing violation on the host-controller side.

Signed-off-by: Hannes Schmelzer <oe5hpm@oevsv.at>

Signed-off-by: Hannes Schmelzer <hannes.schmelzer@br-automation.com>
mmc: fix return value check condition 2018-05-02T01:57:43+00:00 Peng Fan peng.fan@nxp.com 2018-03-05T08:20:40+00:00 0a4c2b099ed44a18c7768001cb974e80bff0f46b sd_read_ssr returns 0, means no error. Fixes: 5b2e72f32721484("mmc: read ssr only if MMC write support is enabled") Signed-off-by: Peng Fan <peng.fan@nxp.com> Cc: Jaehoon Chung <jh80.chung@samsung.com> Cc: Jean-Jacques Hiblot <jjhiblot@ti.com> 
sd_read_ssr returns 0, means no error.
Fixes: 5b2e72f32721484("mmc: read ssr only if MMC write support is enabled")

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Jean-Jacques Hiblot <jjhiblot@ti.com>
Merge git://git.denx.de/u-boot-sunxi 2018-04-30T10:52:32+00:00 Tom Rini trini@konsulko.com 2018-04-30T10:52:32+00:00 abeb9d7897510533ce3a0a9515cac16db5bed834 






Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR
2018-04-27T18:54:48+00:00

Tom Rini
trini@konsulko.com

2018-04-18T17:50:47+00:00

d024236e5a31a2b4b82cbcc98b31b8170fc88d28

We have a large number of places where while we historically referenced
gd in the code we no longer do, as well as cases where the code added
that line "just in case" during development and never dropped it.

Signed-off-by: Tom Rini <trini@konsulko.com>





We have a large number of places where while we historically referenced
gd in the code we no longer do, as well as cases where the code added
that line "just in case" during development and never dropped it.

Signed-off-by: Tom Rini <trini@konsulko.com>







sunxi: improve throughput in the sunxi_mmc driver
2018-04-25T04:59:38+00:00

Philipp Tomsich
philipp.tomsich@theobroma-systems.com

2018-03-21T11:18:58+00:00

5ff8e54888e4d26a352453564f7f599d29696dc9

Throughput tests have shown the sunxi_mmc driver to take over 10s to
read 10MB from a fast eMMC device due to excessive delays in polling
loops.

This commit restructures the main polling loops to use get_timer(...)
to determine whether a (millisecond) timeout has expired.  We choose
not to use the wait_bit function, as we don't need interruptability
with ctrl-c and have at least one case where two bits (one for an
error condition and another one for completion) need to be read and
using wait_bit would have not added to the clarity.

The observed speedup in testing on a A31 is greater than 10x (e.g. a
10MB write decreases from 9.302s to 0.884s).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Tested-by: Mylène Josserand <mylene.josserand@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Tom Rini <trini@konsulko.com>





Throughput tests have shown the sunxi_mmc driver to take over 10s to
read 10MB from a fast eMMC device due to excessive delays in polling
loops.

This commit restructures the main polling loops to use get_timer(...)
to determine whether a (millisecond) timeout has expired.  We choose
not to use the wait_bit function, as we don't need interruptability
with ctrl-c and have at least one case where two bits (one for an
error condition and another one for completion) need to be read and
using wait_bit would have not added to the clarity.

The observed speedup in testing on a A31 is greater than 10x (e.g. a
10MB write decreases from 9.302s to 0.884s).

Signed-off-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Tested-by: Mylène Josserand <mylene.josserand@bootlin.com>
Acked-by: Jagan Teki <jagan@openedev.com>
Reviewed-by: Tom Rini <trini@konsulko.com>







mmc: Staticize sd_select_bus_width
2018-04-23T20:07:46+00:00

Marek Vasut
marek.vasut@gmail.com

2018-04-14T22:36:45+00:00

ec360e64862ae0ab271296e786917e5f9a04e9fb

Staticize the function since it's only used in mmc.c .

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Tom Rini <trini@konsulko.com>





Staticize the function since it's only used in mmc.c .

Signed-off-by: Marek Vasut <marek.vasut@gmail.com>
Cc: Jaehoon Chung <jh80.chung@samsung.com>
Cc: Tom Rini <trini@konsulko.com>







Merge git://git.denx.de/u-boot-uniphier
2018-04-23T16:21:20+00:00

Tom Rini
trini@konsulko.com

2018-04-23T16:21:20+00:00

3853c650e4c1bce8df6bd02f6b682a3cedf4f279












mmc: uniphier-sd: skip clock set-up for SPL
2018-04-23T15:35:34+00:00

Masahiro Yamada
yamada.masahiro@socionext.com

2018-04-20T09:14:25+00:00

fc2d0302b666cd127fca3a8a800f33841de11c41

The size of SPL is hitting the limit (64KB) for uniphier_v7_defconfig.
When booting from SD/eMMC, obviously its clock has been properly set up
by the boot ROM.  Acutually, no need to re-initialize the clock in SPL.

Using a clock driver would generalize the SoC specific code, but
solving the memory footprint problem would win.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>





The size of SPL is hitting the limit (64KB) for uniphier_v7_defconfig.
When booting from SD/eMMC, obviously its clock has been properly set up
by the boot ROM.  Acutually, no need to re-initialize the clock in SPL.

Using a clock driver would generalize the SoC specific code, but
solving the memory footprint problem would win.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>