u-boot.git/drivers/mmc, branch v2018.11

mmc: dw_mmc: Add RCRC handling

2018-11-10T13:16:30+00:00

This patch adds check for command response CRC failure. The driver
is currently ignoring CRC check failure on command resposes which
have CRC atteched to it, which can be potentially dangerous. Even
more grueling problem happens when the command response is followed
by data transfer though, as in that case, the dwmci_data_transfer()
function will spin until it reaches the 240s timeout.

Signed-off-by: Marek Vasut 
Cc: Heiko Stuebner 
Cc: Philipp Tomsich

mmc: tmio: sdhi: Merge DTCNTL access into single register write

2018-11-02T15:07:04+00:00

It is perfectly fine to write th DTCNTL TAP count and enable the
SCC sampling clock operation in the same write.

Signed-off-by: Marek Vasut 
Cc: Masahiro Yamada

mmc: tmio: sdhi: Implement waiting for DAT0 line state

2018-11-02T15:04:45+00:00

When the bus switches to 1.8V mode of operation, it is necessary to
verify that the card correctly initiated and completed the voltage
switch. This is done by reading out the state of DATA0 line.

This patch implement support for reading out the state of the DATA0
line, so the MMC core code can correctly switch to 1.8V mode.

Signed-off-by: Marek Vasut 
Cc: Masahiro Yamada

mmc: tmio: sdhi: Clear HS400 settings when resetting SCC

2018-11-02T15:04:45+00:00

Make sure to clear HS400 configuration when resetting the SCC block.

Signed-off-by: Marek Vasut 
Cc: Masahiro Yamada

mmc: tmio: sdhi: Touch SCC only when UHS capable

2018-11-02T15:04:44+00:00

Add check to avoid touching the SCC tuning registers in case the IP
doesn't support them or if the support isn't in place yet.

Signed-off-by: Marek Vasut 
Cc: Masahiro Yamada

mmc: tmio: Preinitialize regulator to 3.3V

2018-11-02T14:57:14+00:00

Preinitialize the SD card signals regulator to 3.3V, which is the
default post-reset setting, to be sure the regulator is set to a
valid value.

Signed-off-by: Marek Vasut 
Cc: Masahiro Yamada

mmc: tmio: Configure clock before any other IOS

2018-11-02T14:57:14+00:00

Configure the clock settings before reconfiguring any other IO settings.
This is required when the clock must be stopped before changing eg. the
pin configuration or any of the other properties of the bus. Running the
clock configuration first allows the MMC core to do just that.

Signed-off-by: Marek Vasut 
Cc: Masahiro Yamada

mmc: tmio: Silence transfer errors when tuning

2018-11-02T14:57:14+00:00

In case the controller performs card tuning, that is, sends MMC
command 19 or 21, silence possible CRC error warning prints. The
warnings are bound to happen, since the tuning will fail for some
settings while searching for the optimal configuration of the bus
and that is perfectly OK.

This patch passes around the MMC command structure and adds check
into tmio_sd_check_error() to avoid printing CRC error warning
when the tuning happens.

Signed-off-by: Marek Vasut 
Cc: Masahiro Yamada

mmc: tmio: Improve error handling

2018-11-02T14:57:14+00:00

Properly handle return values and abort operations when they are
non-zero. This is a minor improvement, which fixes two remaining
unchecked return values.

Signed-off-by: Marek Vasut 
Cc: Masahiro Yamada

mmc: tmio: Simplify pinmux handling

2018-11-02T14:57:14+00:00

The SD UHS SDR12, SDR25, SDR50, SDR104, DDR50 and MMC HS200, HS400
modes all use 1.8V signaling, while all the legacy modes use 3.3V
signaling. While there are extra modes which use 1.2V signaling,
the existing hardware does not support those.

Simplify the pinmux such that 3.3V signaling implies legacy mode
pinmux and the rest implies UHS mode pinmux. This prevents the
massive case statement from growing further. Moreover, it fixes
an edge case where during SD 1.8V switch, the bus mode is still
set to default while the signaling is already set to 1.8V, which
results in an attempt to communicate with a 1.8V card using pins
in 3.3V mode and thus communication failure.

Signed-off-by: Marek Vasut 
Cc: Masahiro Yamada