u-boot.git/drivers/mmc, branch v2019.04

mmc: correct the HS400 initialization process

2019-03-29T14:53:18+00:00

After the commit b9a2a0e2e9c0 ("mmc: Add support for downgrading
HS200/HS400 to HS mode"), it add a parameter in mmc_set_card_speed()
which indicates that the HS200/HS400 to HS downgrade is happening.

During the HS400 initialization, first select to HS200, and config
the related clock rate, then downgrade to HS mode. So here also need
to config the downgrade value to be true for two reasons. First,
make sure in the function mmc_set_card_speed(), after switch to HS
mode, first config the clock rate, then read the EXT_CSD, avoid
receiving data of EXT_CSD in HS mode at 200MHz. Second, after issue
the MMC_CMD_SWITCH command, it need to wait a bit then switch bus
properties.

Test on i.MX8QM MEK board, some Micron eMMC will stuck in transfer
mode in this case, and USDHC will never get data transfer complete
status, cause the uboot hang.

Signed-off-by: Haibo Chen 
Acked-by: Marek Vasut

Merge branch 'master' of git://git.denx.de/u-boot-sh

2019-03-27T03:19:11+00:00

- Various fixes for bugs found by u-boot test.py

mmc: tmio: Clamp SD_SECCNT to 16bit values on 16bit IP

2019-03-25T19:26:53+00:00

On 16bit variants of the TMIO SD IP, the SECCNT register can only be
programmed to 16bit values, while on the 32bit and 64bit variants it
can be programmed to 32bit values. The SECCNT register indicates the
maximum number of blocks in a continuous transfer. Hence, limit the
maximum continuous transfer block count to 65535 blocks on 16bit
variants of the TMIO IP and to BIT(32)-1 blocks on 32bit and 64bit
variants.

Signed-off-by: Marek Vasut 
Cc: Masahiro Yamada

mmc: sh_mmcif: Set default MMCIF clock rate

2019-03-25T19:26:53+00:00

Set MMCIF clock rate to 97.5 MHz, which is the default according
to Gen2 datasheet.

Signed-off-by: Marek Vasut 
Cc: Nobuhiro Iwamatsu 
Cc: Jaehoon Chung

mmc: Align MMC_TRACE with tiny printf

2019-03-25T15:44:12+00:00

The tiny printf implementation only supports %x format specifier,
it does not support %X . Since it makes little difference whether
the debug output prints hex numbers in capitals or not, change it
to %x and make the MMC_TRACE output work with tiny printf too.

Signed-off-by: Marek Vasut 
Cc: Jaehoon Chung 
Cc: Simon Glass

mmc: renesas: Unconditionally set DTCNTL TAPNUM to 8

2019-02-25T15:07:41+00:00

According to latest specification rev.0026 and after confirmation with
HW engineer, the DTCNTL register TAPNUM field must be set to 8 even on
H3 ES2.0 SoC. Make it so.

Signed-off-by: Marek Vasut 
Cc: Masahiro Yamada

mmc: tmio: Clear BUSWIDTH bit when WMODE bit is set

2019-02-25T15:07:41+00:00

According to latest specification rev.0026, when HOST_MODE bit 0
(WMODE) is not set, HOST_MODE bit 8 (BUSWIDTH) is ignored. Clear
HOST_MODE bit 8 in such case and align the code with Linux and
avoid possible unforeseen issues.

Signed-off-by: Marek Vasut 
Cc: Masahiro Yamada

Merge branch 'master' of git://git.denx.de/u-boot-socfpga

2019-02-19T03:12:59+00:00

- Misc Gen5 fixes
- stratix10 bugfix
- dwmmc bugfix

mmc: dwmmc: Poll for iDMAC TX/RX interrupt

2019-02-18T12:00:54+00:00

Poll for iDMAC TX/RX interrupt before disable DMA.
This to prevent disable DMA before data is transfer
completed.

Signed-off-by: Ley Foon Tan

Merge branch 'master' of git://git.denx.de/u-boot-sh

2019-02-16T22:05:51+00:00

- Various MMC fixes