<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/drivers/mmc, branch v2020.01-rc2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/mmc?h=v2020.01-rc2</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/drivers/mmc?h=v2020.01-rc2'/>
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<updated>2019-11-05T03:21:25Z</updated>
<entry>
<title>mmc: fsl_esdhc_imx: Update compatible string for imx8m</title>
<updated>2019-11-05T03:21:25Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2019-11-04T09:31:17Z</published>
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<id>urn:sha1:f65d08411d76f01ddfb5d44909c667b91b847ddf</id>
<content type='text'>
To enable HS400(ES) and UHS for imx8m platforms, update the driver data
to share with imx8qm esdhc_soc_data.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>mmc: fsl_esdhc_imx: drop redundant clock settings</title>
<updated>2019-11-05T03:21:25Z</updated>
<author>
<name>Peng Fan</name>
<email>peng.fan@nxp.com</email>
</author>
<published>2019-11-04T09:14:15Z</published>
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<id>urn:sha1:1d01c984b9e57e43abc594ca0985128bf2c666eb</id>
<content type='text'>
During mmc initialization, there are several calls to mmc_set_clock
and mmc_set_ios. When mmc_power_off, the mmc-&gt;clock will be set,
but the imx driver will use 400KHz. So the following calls
to mmc_set_ios will set the clock several times which is redundant
in fsl_esdhc_imx driver. So let's simplify to remove redundant
clock settings.

Signed-off-by: Peng Fan &lt;peng.fan@nxp.com&gt;
</content>
</entry>
<entry>
<title>mmc: fsl_esdhc: clean up DM and non-DM code</title>
<updated>2019-11-05T03:21:25Z</updated>
<author>
<name>Yangbo Lu</name>
<email>yangbo.lu@nxp.com</email>
</author>
<published>2019-10-31T10:54:26Z</published>
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<id>urn:sha1:618704753e4dd9fad2435096a67612a878a6d84f</id>
<content type='text'>
Make DM and non-DM code clear using below structure.
	#if !CONFIG_IS_ENABLED(DM_MMC)
		&lt;non-DM_MMC code&gt;
	#else
		&lt;DM_MMC code&gt;
	#endif

Signed-off-by: Yangbo Lu &lt;yangbo.lu@nxp.com&gt;
</content>
</entry>
<entry>
<title>mmc: fsl_esdhc: always check write protect state</title>
<updated>2019-11-05T03:21:25Z</updated>
<author>
<name>Yangbo Lu</name>
<email>yangbo.lu@nxp.com</email>
</author>
<published>2019-10-31T10:54:25Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0cc127c424ea313b1afc3e53f7c1ba248961728e'/>
<id>urn:sha1:0cc127c424ea313b1afc3e53f7c1ba248961728e</id>
<content type='text'>
The QorIQ eSDHC on all platforms supports checking write protect
state through register bit. So check it always.

Signed-off-by: Yangbo Lu &lt;yangbo.lu@nxp.com&gt;
</content>
</entry>
<entry>
<title>mmc: fsl_esdhc: drop redundant code for non-removable feature</title>
<updated>2019-11-05T03:21:25Z</updated>
<author>
<name>Yangbo Lu</name>
<email>yangbo.lu@nxp.com</email>
</author>
<published>2019-10-31T10:54:24Z</published>
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<id>urn:sha1:08197cb8dff7cd097ab07a325093043c39d19bbd</id>
<content type='text'>
Drop redundant code for non-removable feature. "non-removable" property
has been read in mmc_of_parse().

Signed-off-by: Yangbo Lu &lt;yangbo.lu@nxp.com&gt;
</content>
</entry>
<entry>
<title>mmc: fsl_esdhc: convert to use fsl_esdhc_get_cfg_common()</title>
<updated>2019-11-05T03:21:25Z</updated>
<author>
<name>Yangbo Lu</name>
<email>yangbo.lu@nxp.com</email>
</author>
<published>2019-10-31T10:54:23Z</published>
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<id>urn:sha1:5705973b093e226d3122d1d6439628e1dad24528</id>
<content type='text'>
The fsl_esdhc_init() was actually to get configuration of mmc_config.
So rename it to fsl_esdhc_get_cfg_common() and make it common for both
DM_MMC and non-DM_MMC.

Signed-off-by: Yangbo Lu &lt;yangbo.lu@nxp.com&gt;
</content>
</entry>
<entry>
<title>mmc: fsl_esdhc: clean up bus width configuration code</title>
<updated>2019-11-05T03:21:24Z</updated>
<author>
<name>Yangbo Lu</name>
<email>yangbo.lu@nxp.com</email>
</author>
<published>2019-10-31T10:54:22Z</published>
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<id>urn:sha1:07bae1de382723b94244096953b05225572728cd</id>
<content type='text'>
This patch is to clean up bus width setting code.

- For DM_MMC, remove getting "bus-width" from device tree.
  This has been done in mmc_of_parse().

- For non-DM_MMC, move bus width configuration from fsl_esdhc_init()
  to fsl_esdhc_initialize() which is non-DM_MMC specific.
  And fix up bus width configuration to support only 1-bit, 4-bit,
  or 8-bit. Keep using 8-bit if it's not set because many platforms
  use driver without providing max bus width.

- Remove bus_width member from fsl_esdhc_priv structure.

Signed-off-by: Yangbo Lu &lt;yangbo.lu@nxp.com&gt;
</content>
</entry>
<entry>
<title>mmc: fsl_esdhc: fix voltage validation</title>
<updated>2019-11-05T03:21:24Z</updated>
<author>
<name>Yangbo Lu</name>
<email>yangbo.lu@nxp.com</email>
</author>
<published>2019-10-31T10:54:21Z</published>
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<id>urn:sha1:5b05fc0310cd933acf76ee661577c6b07a95e684</id>
<content type='text'>
Voltage validation should be done by CMD8. Current comparison between
mmc_cfg voltages and host voltage capabilities is meaningless.
So drop current comparison and let voltage validation is through CMD8.

Signed-off-by: Yangbo Lu &lt;yangbo.lu@nxp.com&gt;
</content>
</entry>
<entry>
<title>mmc: fsl_esdhc: drop controller initialization in fsl_esdhc_init()</title>
<updated>2019-11-05T03:21:24Z</updated>
<author>
<name>Yangbo Lu</name>
<email>yangbo.lu@nxp.com</email>
</author>
<published>2019-10-31T10:54:20Z</published>
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<id>urn:sha1:531ccd407c93347c1be81470e3604c3ef63e97bf</id>
<content type='text'>
Controller initialization is not needed in fsl_esdhc_init().
It will be done in esdhc_init() for non-DM_MMC, and in
esdhc_init_common() in probe for DM_MMC.

Signed-off-by: Yangbo Lu &lt;yangbo.lu@nxp.com&gt;
</content>
</entry>
<entry>
<title>mmc: fsl_esdhc: drop i.MX DDR support code</title>
<updated>2019-10-29T02:09:22Z</updated>
<author>
<name>Yangbo Lu</name>
<email>yangbo.lu@nxp.com</email>
</author>
<published>2019-10-21T10:09:09Z</published>
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<id>urn:sha1:5d336d1701567e5025c3010b325e633a677c30a2</id>
<content type='text'>
A previous patch below adding DDR mode support was actually for i.MX
platforms. Now i.MX eSDHC driver is fsl_esdhc_imx.c. For QorIQ eSDHC,
it uses different process for DDR mode, and hasn't been supported.
Let's drop DDR support code for i.MX in fsl_esdhc driver.

0e1bf61 mmc: fsl_esdhc: Add support for DDR mode

Signed-off-by: Yangbo Lu &lt;yangbo.lu@nxp.com&gt;
</content>
</entry>
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