u-boot.git/drivers/mmc, branch v2021.01

Merge tag 'u-boot-atmel-fixes-2021.01-b' of https://gitlab.denx.de/u-boot/custodians/u-boot-atmel

2020-12-11T20:55:17Z

Second set of u-boot-atmel fixes for 2021.01 cycle This set includes very important fixes for: MMC booting on several boards, drive strength on sam9x60ek mmc lines, compile issues for timer.c old driver, removal of unwanted access to sam9x60 bit for oscillator bypass mode, and eeproms read on sama5d2_icp.

Merge tag 'u-boot-stm32-20201209' of https://gitlab.denx.de/u-boot/custodians/u-boot-stm

2020-12-09T16:36:41Z

- Manage CONFIG_ENV_EXT4_DEVICE_AND_PART in stm32mp1 board - Update ARM STI and ARM STM STM32MP Arch maintainers emails - Enable internal pull-ups for SDMMC1 on DHCOM SoM

treewide: Update email address Patrick Delaunay and Patrice Chotard

2020-12-09T09:57:50Z

Update Patrick and my email address with the one dedicated to upstream activities. Signed-off-by: Patrice Chotard Reviewed-by: Patrick Delaunay

mmc: fsl_esdhc_imx: optimize the timing setting

2020-12-06T14:31:37Z

For imx usdhc/esdhc, once set the DDR_EN, enable the DDR mode, the card clock will be divied by 2 automatically by the host. So need to first config the DDR_EN correctly, then update the card clock. This will make sure the actual card clock is as our expected. IC also suggest config the DDR_EN firstly, then config the clock divider. For HS400/HS400ES mode, need to config the strobe dll, this need to based on the correct target clock rate, so need to do this after clock rate is update. Signed-off-by: Haibo Chen Reviewed-by: Jaehoon Chung

mmc: fsl_esdhc_imx: add wait_dat0() support

2020-12-06T14:31:36Z

Add wait_dat0() support, upper layer will use this callback. Signed-off-by: Haibo Chen Reviewed-by: Jaehoon Chung

mmc: check a return value about regulator's always-on

2020-11-28T02:44:39Z

Regulator can be set to "always-on". It's not error about enable/disable. It needs to check about its condition. Signed-off-by: Jaehoon Chung Reviewed-by: Peng Fan

mmc: display an error number to debug

2020-11-28T02:43:42Z

It's useful to know an error number when it's debugging. Signed-off-by: Jaehoon Chung Reviewed-by: Peng Fan

mmc: fsl_esdhc: make sure delay chain locked for HS400

2020-11-28T02:39:44Z

For eMMC HS400 mode, the DLL reset is a required step for mmc rescan. This step has not been documented in reference manual, but the RM will be fixed sooner or later. In previous commit to support eMMC HS400, db8f936 mmc: fsl_esdhc: support eMMC HS400 mode the steps to configure DLL could be found in commit message, 13. Set DLLCFG0[DLL_ENABLE] and DLLCFG0[DLL_FREQ_SEL]. 14. Wait for delay chain to lock. these would be fixed as, 13. Set DLLCFG0[DLL_ENABLE] and DLLCFG0[DLL_FREQ_SEL]. 13.1 Write DLLCFG0[DLL_RESET] to 1 and wait for 1us, then write DLLCFG0[DLL_RESET] 14. Wait for delay chain to lock. This patch is to add the step of DLL reset, and make sure delay chain locked for HS400. Fixes: db8f93672b42 ("mmc: fsl_esdhc: support eMMC HS400 mode") Signed-off-by: Yangbo Lu Reviewed-by: Jaehoon Chung

mmc: fsl_esdhc: set sysctl register for clock initialization

2020-11-28T02:39:44Z

The initial clock setting should be through sysctl register only, while the mmc_set_clock() will call mmc_set_ios() introduce other configurations like bus width, mode, and so on. Signed-off-by: Yangbo Lu Reviewed-by: Jaehoon Chung

mmc: Add some helper functions for retrying on error

2020-11-28T02:39:44Z

All of the existing quirks add retries to various calls of mmc_send_cmd. mmc_send_cmd_quirks is a helper function to do this retrying behavior. It checks if quirks mode is enabled, and if a specific quirk is activated it retries on error. This also adds mmc_send_cmd_retry, which retries on error every time (instead of if a quirk is activated). Signed-off-by: Sean Anderson Reviewed-by: Jaehoon Chung Reviewed-by: Jaehoon Chung