u-boot.git/drivers/mmc, branch v2021.04

mmc: mtk-sd: don't ignore max-frequency from device tree

2021-03-17T16:27:58Z

commit e58e68d9 ("mmc: mtk-sd: assign plat->cfg.f_max with a correct value") wrongly assumed that plat->cfg.f_max is always unset at the time mscd_drv_probe() is run. This is not true in case max-frequency being defined in device tree, as it is then already set by mmc_of_parse() in msdc_of_to_plat(). Only set plat->cfg.f_max to the default maximum value in case it is not already set to a sane value. Fixes: e58e68d93e ("mmc: mtk-sd: assign plat->cfg.f_max with a correct value") Cc: Stefan Roese Cc: Weijie Gao Signed-off-by: Daniel Golle

Merge tag 'u-boot-imx-20210303' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx

2021-03-03T15:10:34Z

i.MX for 2021.04 ---------------- - new boards: - i.MX8MN Beacon EmbeddedWorks (2GB) - Gateworks Venice imx8mm - convert to DM: - imx53-qsb, mx53loco, mx51evk, mx23-evk - Fixes : - Network : FEC ethernet quirks - DH dh-imx6 CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/6597

drivers: mmc: iproc_sdhci: enable HS200 mode

2021-03-02T12:53:37Z

Add tuning functionality which is needed for HS200 mode. For HS200, program the correct needed 1.8 voltage Signed-off-by: Bharat Gooty Signed-off-by: Rayagonda Kokatanur Reviewed-by: Jaehoon Chung Signed-off-by: Matthias Brugger

mmc: fsl_esdhc_imx: fix the DTOCV to 0xE

2021-03-01T09:21:36Z

On imx6Q/imx6DL, we find if config the DTOCV to 0~3, it will impact cmd6 behavior, after cmd6 get transfer complete interrupt, the data0 line will keep low over 5 seconds. This should be a IC bug on imx6Q/DL. For other platforms, do not has this issue. To fix this issue, fix the DTOCV to 0xE, the max setting, this also align with Linux configuration. Signed-off-by: Haibo Chen Reviewed-by: Ye Li Reviewed-by: Jaehoon Chung

mmc: fsl_esdhc_imx: Add a compatible for i.MX51

2021-03-01T09:21:36Z

Add a compatible for i.MX51 so that i.MX51 can use this driver via driver model. Signed-off-by: Fabio Estevam Reviewed-by: Jaehoon Chung

mmc: sandbox: Add support for writing

2021-02-26T14:30:55Z

This adds support writing to the sandbox mmc backed by an in-memory buffer. The unit test has been updated to test reading, writing, and erasing. I'm not sure what MMCs erase to; I picked 0, but if it's 0xFF then that can be easily changed. Signed-off-by: Sean Anderson Reviewed-by: Simon Glass

Merge tag 'xilinx-for-v2021.04-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze

2021-02-23T15:45:55Z

Xilinx changes for v2021.04-rc3 qspi: - Support for dual/quad mode - Fix speed handling clk: - Add clock enable function for zynq/zynqmp/versal gem: - Enable clock for Versal - Fix error path - Fix mdio deregistration path fpga: - Fix buffer alignment for ZynqMP xilinx: - Fix reset reason clearing in ZynqMP - Show silicon version in SPL for Zynq/ZynqMP - Fix DTB selection for ZynqMP - Rename zc1275 to zcu1275 to match DT name

clk: zynq: Add dummy clock enable function

2021-02-23T13:56:59Z

A lot of Xilinx drivers are checking -ENOSYS which means that clock driver doesn't have enable function. Remove this checking from drivers and create dummy enable function as was done for clk_fixed_rate driver by commit 6bf6d81c1112 ("clk: fixed_rate: add dummy enable() function"). Signed-off-by: Michal Simek

mmc: rockchip_dw_mmc: use mmc_pwrseq instead of rockchip_mmc_pwrseq

2021-02-19T07:11:08Z

Use mmc_pwrseq instead of rockchip_mmc_pwrseq. Signed-off-by: Jaehoon Chung

mmc: meson_gx_mmc: use mmc_pwrseq instead of meson_mmc_pwrseq

2021-02-19T07:10:46Z

Use mmc_pwrseq instead of meson_mmc_pwrseq. Signed-off-by: Jaehoon Chung Acked-by: Neil Armstrong