u-boot.git/drivers/mmc, branch v2021.07

Revert "mmc: fsl_esdhc_imx: use VENDORSPEC_FRC_SDCLK_ON to control card clock output"

2021-06-22T04:03:32Z

This reverts commit 63756575b42b8b4fb3f59cbbf0cedf03331bc2d2. Since this commit a imx6qdl-pico board boots extremely slowly in both SPL as well as U-Boot proper. Fix this regression by reverting the offending commit for now. Signed-off-by: Fabio Estevam Reviewed-by: Jaehoon Chung Tested-by: Pierre-Jean Texier

mmc: mmc-uclass: change to static about dm function

2021-06-22T04:03:20Z

Change to static about dm function. They can be used with wrapper functions. Signed-off-by: Jaehoon Chung

mmc: fsl_esdhc_imx: use mmc_send_cmd instead of dm_mmc_send_cmd

2021-06-22T04:03:11Z

Use mmc_send_cmd instead of dm_mmc_send_cmd. It doesn't need to distinguish this function. Signed-off-by: Jaehoon Chung

mmc: dwmmc: socfpga: Get "fifo-mode" property from DT

2021-06-22T04:02:32Z

Add FIFO mode support for SoCFPGA dwmmc, read "fifo-mode" property from DT. Signed-off-by: Ley Foon Tan Reviewed-by: Jaehoon Chung

mmc: dw_mmc: Fixes data read when receiving DTO interrupt in FIFO mode

2021-06-22T04:02:11Z

The data read is not working when using FIFO mode. From DesignWare databook, when a Data_Transfer_Over (DTO) interrupt is received, the software should read the remaining data from FIFO. Add DTO interrupt checking on data read path and clear interrupts before start reading from FIFO. So, it doesn't clear the next pending interrupts unintentionally after read from FIFO. Signed-off-by: Ley Foon Tan Reviewed-by: Jaehoon Chung

mmc: mtk-sd: increase the minimum bus frequency

2021-06-22T04:01:52Z

With a 48MHz input clock, the lowest bus frequency can be as low as 48000000 / (4 * 4095) = 2930Hz. Such an extremely low frequency will cause the mmc framework take seconds to finish the initialization. Limiting the minimum bus frequency to a slightly higher value can solve the issue without any side effects. Reviewed-by: Jaehoon Chung Signed-off-by: Weijie Gao

mmc: fsl_esdhc_imx: drop CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33

2021-06-17T06:16:11Z

There is no i.MX board using such option. Drop it. Signed-off-by: Yangbo Lu Reviewed-by: Priyanka Jain

mmc: fsl_esdhc: convert to CONFIG_FSL_ESDHC_VS33_NOT_SUPPORT

2021-06-17T06:16:11Z

For eSDHC, power supply is through peripheral circuit. Some eSDHC versions have value 0 of the bit but that does not reflect the truth. 3.3V is common for SD/MMC, and is supported for all boards with eSDHC in current u-boot. So, make 3.3V is supported in default in code. CONFIG_FSL_ESDHC_VS33_NOT_SUPPORT can be enabled if future board does not support 3.3V. This is also a fix-up for one previous patch, which converted to use IS_ENABLED() for CONFIG_SYS_FSL_MMC_HAS_CAPBLT_VS33 that is not a Kconfig option. Fixes: 52faec31827e ("mmc: fsl_esdhc: replace most #ifdefs by IS_ENABLED()") Signed-off-by: Yangbo Lu Reviewed-by: Jaehoon Chung Reviewed-by: Priyanka Jain

Merge tag 'ti-v2021.07-rc3' of https://source.denx.de/u-boot/custodians/u-boot-ti

2021-05-12T14:07:21Z

- Initial support for AM64 EVM and SK - K3 DDR driver unification for J7 and AM64 platforms. - Minor fixes for TI clock driver

mmc: sdhci_am654: Add Support for TI's AM642 SoC

2021-05-12T10:57:57Z

Add support for the controller present on the AM642 SoC. There are instances: sdhci0: 8bit bus width, max 400 MBps sdhci1: 4bit bus width, max 100 MBps Signed-off-by: Dave Gerlach