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<title>u-boot.git/drivers/mmc, branch v2021.10</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/mmc?h=v2021.10</id>
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<updated>2021-09-13T23:02:10Z</updated>
<entry>
<title>sunxi: mmc: A20: Fix MMC optimisation</title>
<updated>2021-09-13T23:02:10Z</updated>
<author>
<name>Andre Przywara</name>
<email>andre.przywara@arm.com</email>
</author>
<published>2021-09-03T15:49:16Z</published>
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<id>urn:sha1:0b508ca821d383b2fd68f4b581cf606e329fff36</id>
<content type='text'>
Some SoCs (as seen on A20) seem to misreport the MMC FIFO level if the
FIFO is completely full: the level size reads as zero, but the FIFO_FULL
bit is set. We won't do a single iteration of the read loop in this
case, so will be stuck forever.

Check for this situation and use a safe minimal FIFO size instead when
we hit this case.

This fixes MMC boot on A20 devices after the MMC FIFO optimisation
(9faae5457f52).

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Reviewed-by: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
</content>
</entry>
<entry>
<title>mmc: fsl_esdhc: remove 1ms sleep in esdhc_send_cmd_common()</title>
<updated>2021-09-13T03:46:50Z</updated>
<author>
<name>Michael Walle</name>
<email>michael@walle.cc</email>
</author>
<published>2021-09-10T09:20:52Z</published>
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<id>urn:sha1:285edfd7821e79de579b0bf1a7328dead2304a0b</id>
<content type='text'>
Since the beginning of this driver which was initially for the MPC8379
and MPC8536 SoCs, there is this spurious 1ms delay. According to the
comment it should actually be only 8 clock cycles. Esp. during EFI block
transfers, this 1ms add up to a significant delay and slows down EFI
boot.

I couldn't find any mention in the MPC8536 that there should be a delay
of 8 clock cycles between commands. The SD card specification mentions that
the clock has to be left enabled for 8 cycles after a command or
response. But I don't see how this delay will help with this.

Go ahead and just remove it. If there will ever be any regression we can
introduce a compile time flag, but for now I'd like to keep it simple.

In the split off imx driver this delay was also removed in commit
9098682200e6 ("mmc: fsl_esdhc_imx: remove the 1ms delay before sending
command").

Signed-off-by: Michael Walle &lt;michael@walle.cc&gt;
</content>
</entry>
<entry>
<title>mmc: fix device_remove when HS400_ES is enabled</title>
<updated>2021-09-10T10:17:49Z</updated>
<author>
<name>Ye Li</name>
<email>ye.li@nxp.com</email>
</author>
<published>2021-08-17T09:20:34Z</published>
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<id>urn:sha1:fb8c2e8fa936f8ebe4b7cc822abe33ff620585cd</id>
<content type='text'>
HS400_ES is missed when down grade to HS mode during
device_remove the mmc device

Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
Reviewed-by: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
</content>
</entry>
<entry>
<title>mmc: fix switch issue with send_status disabled</title>
<updated>2021-09-10T10:17:41Z</updated>
<author>
<name>Ye Li</name>
<email>ye.li@nxp.com</email>
</author>
<published>2021-08-17T09:20:33Z</published>
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<id>urn:sha1:3f4e52fc9d81e95ee90f6be7b05ca62fc8c7c1e3</id>
<content type='text'>
When send_status is false or wait_dat0 is not supported, the switch
function should not send CMD13 but directly return.

Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
Reviewed-by: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
</content>
</entry>
<entry>
<title>mmc: Add support for enumerating MMC card in a given mode using mmc command</title>
<updated>2021-09-10T10:17:04Z</updated>
<author>
<name>Aswath Govindraju</name>
<email>a-govindraju@ti.com</email>
</author>
<published>2021-08-13T17:34:41Z</published>
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<id>urn:sha1:19f7a34a4642e25aa8b80c6d75129fe7848a158d</id>
<content type='text'>
Add support for enumerating MMC card in a given mode using mmc rescan and
mmc dev commands. The speed mode is provided as the last argument in these
commands and is indicated using the index from enum bus_mode in
include/mmc.h. A speed mode can be set only if it has already been enabled
in the device tree.

Signed-off-by: Aswath Govindraju &lt;a-govindraju@ti.com&gt;
Reviewed-by: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
Tested-by: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
</content>
</entry>
<entry>
<title>Revert "mmc: sdhci: set to INT_DATA_END when there are data"</title>
<updated>2021-09-10T10:13:34Z</updated>
<author>
<name>Yuezhang.Mo@sony.com</name>
<email>Yuezhang.Mo@sony.com</email>
</author>
<published>2021-03-17T06:44:37Z</published>
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<id>urn:sha1:4a3ea75de4c5b3053eac326bf1c753ed65df8cb9</id>
<content type='text'>
This reverts commit 17ea3c862865c0d704646f67dbf8412f9ff54f59.

In eMMC specification, for the response-with-busy(R1b, R5b)
command, the DAT0 will driven to LOW as BUSY status, and in
sdhci specification, the transfer complete bit should be wait
for BUSY status de-assert.

All response-with-busy commands don't contain data, the data
judgement is no need.

Signed-off-by: Yuezhang.Mo &lt;Yuezhang.Mo@sony.com&gt;
Reviewed-by: Andy Wu &lt;Andy.Wu@sony.com&gt;
Reviewed-by: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
</content>
</entry>
<entry>
<title>Merge tag 'xilinx-for-v2021.10-rc3' of https://gitlab.denx.de/u-boot/custodians/u-boot-microblaze</title>
<updated>2021-08-27T12:33:02Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2021-08-27T12:33:02Z</published>
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<id>urn:sha1:b9cb74a5aa256fc34a1b2b9dd847a985b91f34f6</id>
<content type='text'>
Xilinx changes for v2021.10-rc3

xilinx:
- Disable CONFIG_ARCH_FIXUP_FDT_MEMORY
- Print information about cpu via soc drivers and enable DISPLAY_CPUINFO
- Wire infrastructure for DTB_RESELECT and MULTI_DTB_FIT

zynq:
- Wire single QSPI
- Use power-source instead of io-standard properties
- Enable nor on zc770-xm012

zynqmp:
- Change handling around multi_boot()
- Setup offset for u-boot.itb in spi
- Generate run time dfu_alt_info for capsule update
- Use explicit values for enums (zynqmp_firmware.h)
- Enable RTC/SHA1/BUTTON/BUTTON_GPIO command
- Disable WDT driver by default
- Bind usb/scsi via preboot because of EFI
- DT updates/fixes
- Add soc driver
- Fix SPL SPI boot mode

versal:
- Add soc driver

sdhci:
- Update tap delay programming for zynq_sdhci driver

cmd:
- Fix RTC uclass handling in date command
- Update pwm help message
- Update reset help message

watchdog:
- Fix wwdt compilation

rtc:
- Deal with seq alias in rtc uclass
- Add zynqmp RTC driver

fdt:
- Add kernel-doc for fdt_fixup_memory_banks()
</content>
</entry>
<entry>
<title>mmc: zynq_sdhci: Use set_control_reg from sdhci.c</title>
<updated>2021-08-26T06:08:11Z</updated>
<author>
<name>Ashok Reddy Soma</name>
<email>ashok.reddy.soma@xilinx.com</email>
</author>
<published>2021-08-03T05:20:46Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3ae330c1776223722e3f582fc95c51c318d57a8f'/>
<id>urn:sha1:3ae330c1776223722e3f582fc95c51c318d57a8f</id>
<content type='text'>
Since set_control_reg is available in sdhci.c, use it and remove
arasan_sdhci_set_control_reg().

Signed-off-by: Ashok Reddy Soma &lt;ashok.reddy.soma@xilinx.com&gt;
Reviewed-by: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>mmc: zynq_sdhci: Wait till sd card detect state is stable</title>
<updated>2021-08-26T06:08:11Z</updated>
<author>
<name>T Karthik Reddy</name>
<email>t.karthik.reddy@xilinx.com</email>
</author>
<published>2021-08-03T05:20:45Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b6f44082d5cd2ea2758f09df4e364ded6f81323a'/>
<id>urn:sha1:b6f44082d5cd2ea2758f09df4e364ded6f81323a</id>
<content type='text'>
As per SD spec when SD host controller is reset, it takes 1000msec
to detect the card state. In case, if we enable the sd bus voltage &amp;
card detect state is not stable, then host controller will disable
the sd bus voltage.

In case of warm/subsystem reboot, due to unstable card detect state
host controller is disabling the sd bus voltage to sd card causing
sd card timeout error. So we wait for a maximum of 1000msec to get
the card detect state stable before we enable the sd bus voltage.

This current fix is workaround for now, this needs to be analysed
further. Zynqmp platform should behave the same as Versal, but we
did not encounter this issue as of now. So we are fixing it for
Versal only.

Signed-off-by: T Karthik Reddy &lt;t.karthik.reddy@xilinx.com&gt;
Signed-off-by: Ashok Reddy Soma &lt;ashok.reddy.soma@xilinx.com&gt;
Reviewed-by: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>mmc: zynq_sdhci: Move setting tapdelay code to driver</title>
<updated>2021-08-26T06:08:01Z</updated>
<author>
<name>Ashok Reddy Soma</name>
<email>ashok.reddy.soma@xilinx.com</email>
</author>
<published>2021-08-03T05:20:44Z</published>
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<id>urn:sha1:655d69faaf4bb1e7d3e9c31f07259b61c27e719e</id>
<content type='text'>
Move tapdelay function calls to zynq_sdhci.c and make them static
inline. zynqmp_tap_delay.h has function prototypes for the functions
defined in tap_delays.c, which will not be needed anymore.

Remove tap_delays.c and zynqmp_tap_delay.h files.

Signed-off-by: Ashok Reddy Soma &lt;ashok.reddy.soma@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
Reviewed-by: Jaehoon Chung &lt;jh80.chung@samsung.com&gt;
</content>
</entry>
</feed>
