u-boot.git/drivers/mmc, branch v2023.07

mmc: rockchip_sdhci: Disable DMA mode using a device tree property

2023-05-18T00:34:45+00:00

Loading part of TF-A into SRAM from eMMC using DMA fails on RK3399
similar to other Rockchip SoCs. Checksum validation fails with:

  ## Checking hash(es) for Image atf-2 ... sha256 error!
  Bad hash value for 'hash' hash node in 'atf-2' image node
  spl_load_simple_fit: can't load image loadables index 1 (ret = -1)
  mmc_load_image_raw_sector: mmc block read error
  SPL: failed to boot from all boot devices
  ### ERROR ### Please RESET the board ###

Add a device tree property, u-boot,spl-fifo-mode, to control when the
rockchip_sdhci driver should disable the use of DMA and fallback on PIO
mode. Same device tree property is used by the rockchip_dw_mmc driver.

In commit 2cc6cde647e2 ("mmc: rockchip_sdhci: Limit number of blocks
read in a single command") the DMA mode was disabled using a CONFIG
option on RK3588. Revert that and instead disable DMA using the device
tree property for all RK3588 boards, also apply similar workaround for
all RK3399 boards.

Fixes: 2cc6cde647e2 ("mmc: rockchip_sdhci: Limit number of blocks read in a single command")
Signed-off-by: Jonas Karlman 
Reviewed-by: Kever Yang 
Tested-by: Quentin Schulz  # RK3399 Puma, RK3588 Tiger

mmc: rockchip_sdhci: Skip blocks read workaround on RK3399

2023-05-18T00:34:45+00:00

The workaround to limit number of blocks to read in a single command
should only be applied to RK3568 and RK3588. Change to be more strict
when to apply the workaround.

Fixes: 2cc6cde647e2 ("mmc: rockchip_sdhci: Limit number of blocks read in a single command")
Suggested-by: Simon Glass 
Signed-off-by: Jonas Karlman 
Reviewed-by: Kever Yang 
Tested-by: Quentin Schulz  # RK3399 Puma, RK3588 Tiger

Revert "mmc: s5p_sdhci: unset the SDHCI_QUIRK_BROKEN_R1B"

2023-05-15T21:14:46+00:00

This reverts commit a034ec06ff1d558bbe11d5ee05edbb4de3ee2215.

Commit 4a3ea75de4c5 ("Revert "mmc: sdhci: set to INT_DATA_END when
there are data"") reverted the alternative fix that was added for
Exynos 4 devices, causing an error when trying to boot from an sdcard:

    <...>
    Loading Environment from MMC... sdhci_send_command: Timeout for status update!
    mmc fail to send stop cmd
    <...>

Re-add the quirk to allow booting from sdcards again.

Signed-off-by: Henrik Grimler

drivers: use devfdt_get_addr_index_ptr when cast to pointer

2023-05-06T09:28:18+00:00

The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU
can expect 64-bit data from the device tree parser, so use
devfdt_get_addr_index_ptr instead of the devfdt_get_addr_index function
in the various files in the drivers directory that cast to a pointer.
As we are there also streamline the error response to -EINVAL on return.

Signed-off-by: Johan Jonker 
Reviewed-by: Simon Glass

drivers: use dev_read_addr_ptr when cast to pointer

2023-05-06T09:28:18+00:00

The fdt_addr_t and phys_addr_t size have been decoupled. A 32bit CPU
can expect 64-bit data from the device tree parser, so use
dev_read_addr_ptr instead of the dev_read_addr function in the
various files in the drivers directory that cast to a pointer.
As we are there also streamline the error response to -EINVAL on return.

Signed-off-by: Johan Jonker 
Reviewed-by: Simon Glass

mmc: hi6220_dw_mmc: add compatible for HC2910 support

2023-05-03T13:05:24+00:00

It adds compatible "hisilicon,hi3798mv200-dw-mshc" for HC2910 SoC
Hi3798MV200 to probe this mmc driver.

Signed-off-by: Yang Xiwen

mmc: rockchip_sdhci: Limit number of blocks read in a single command

2023-04-21T07:55:29+00:00

Using DMA to load TF-A into SRAM fails when booting from eMMC on RK3588.

  ## Checking hash(es) for Image atf-3 ... sha256 error!
  Bad hash value for 'hash' hash node in 'atf-3' image node
  spl_load_simple_fit: can't load image loadables index 2 (ret = -1)
  mmc_load_image_raw_sector: mmc block read error

Fix this by using PIO mode in SPL and limit the number of blocks used in
a single read command to avoid triggering Data End Bit Error interrupt.

Signed-off-by: Jonas Karlman 
Reviewed-by: Kever Yang

mmc: sdhci: Allow disabling of SDMA in SPL

2023-04-21T07:55:29+00:00

Rockchip emmc devices have a similar issue to Rockchip dwmmc devices,
where performing DMA to SRAM later causes issues with suspend/resume.

Allow us to toggle SDMA in SPL for sdhci similar to ADMA support, so we
can ensure DMA is not used when loading the SRAM code.

Signed-off-by: Peter Geis 
Reviewed-by: Jaehoon Chung 
Reviewed-by: Kever Yang 
[jonas@kwiboo.se: add Kconfig default value and fix ADMA typo]
Signed-off-by: Jonas Karlman

mmc: rockchip_sdhci: Add support for RK3588

2023-04-21T07:55:29+00:00

Add support for RK3588 to the rockchip sdhci driver.

Use driver data to handle differences between RK3568 and RK3588:

- Set "Receive original clock source is auto gating" for RK3588.
- Set "Receive clock source is no-inverted" only on RK3568 and "Transmit
  clock source is invertion of original clock input" for RK3588.
- Use different txclk_tapnum for HS400 modes on RK3588.
- Configure the CMDOUT reg for HS400 modes for RK3588.

This is based on the mainline linux and vendor kernel driver and have
successfully been tested with rock5b-rk3588_defconfig and

  CONFIG_MMC_HS200_SUPPORT=y
  CONFIG_MMC_HS400_SUPPORT=y
  CONFIG_MMC_HS400_ES_SUPPORT=y
  CONFIG_MMC_SPEED_MODE_SET=y

using the following command to switch mode and then read 512 MiB of data
from eMMC into memory,

  => mmc dev 0 0  && mmc info && mmc read 10000000 2000 10000

for each of the modes below.

  0 = MMC legacy
  1 = MMC High Speed (26MHz)
  3 = MMC High Speed (52MHz)
  4 = MMC DDR52 (52MHz)
  10 = HS200 (200MHz)
  11 = HS400 (200MHz)
  12 = HS400ES (200MHz)

Signed-off-by: Yifeng Zhao 
Signed-off-by: Jonas Karlman 
Reviewed-by: Shawn Lin 
Reviewed-by: Kever Yang

mmc: rockchip_sdhci: Fix HS400 and HS400ES mode on RK3568

2023-04-21T07:55:29+00:00

Adjust tap number for transmit clock, tap number and delay number for
strobe input to fix HS400 modes on RK3568.

New values have been picked from vendor kernel and u-boot and have
successfully been tested with rock-3a-rk3568_defconfig and

  CONFIG_MMC_HS200_SUPPORT=y
  CONFIG_MMC_HS400_SUPPORT=y
  CONFIG_MMC_HS400_ES_SUPPORT=y
  CONFIG_MMC_SPEED_MODE_SET=y

using the following command to switch mode and then read 512 MiB of data
from eMMC into memory,

  => mmc dev 0 0  && mmc info && mmc read 10000000 2000 10000

for each of the modes below.

  0 = MMC legacy
  1 = MMC High Speed (26MHz)
  3 = MMC High Speed (52MHz)
  4 = MMC DDR52 (52MHz)
  10 = HS200 (200MHz)
  11 = HS400 (200MHz)
  12 = HS400ES (200MHz)

Signed-off-by: Yifeng Zhao 
Signed-off-by: Jonas Karlman 
Reviewed-by: Kever Yang