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<title>u-boot.git/drivers/mtd/nand, branch v2009.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
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<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx</title>
<updated>2008-12-30T22:30:47+00:00</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2008-12-30T22:30:47+00:00</published>
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<pre>
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<entry>
<title>NAND FSL elbc: Use virt_to_phys to determine which bank is in use</title>
<updated>2008-12-20T00:20:08+00:00</updated>
<author>
<name>Kumar Gala</name>
<email>galak@kernel.crashing.org</email>
</author>
<published>2008-12-16T20:59:22+00:00</published>
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The current code that determines which bank/chipselect is used for a
given NAND instance only worked for 32-bit addresses and assumed
a 1:1 mapping.  This breaks in 36-bit physical configs.

The proper way to handle this is to use the virt_to_phys() and
BR_PHYS_ADDR() routinues to match the 34-bit lbc bus address
with the the virtual address the NAND code uses.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Acked-by: Scott Wood &lt;scottwood@freescale.com&gt;
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<pre>
The current code that determines which bank/chipselect is used for a
given NAND instance only worked for 32-bit addresses and assumed
a 1:1 mapping.  This breaks in 36-bit physical configs.

The proper way to handle this is to use the virt_to_phys() and
BR_PHYS_ADDR() routinues to match the 34-bit lbc bus address
with the the virtual address the NAND code uses.

Signed-off-by: Kumar Gala &lt;galak@kernel.crashing.org&gt;
Acked-by: Scott Wood &lt;scottwood@freescale.com&gt;
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</entry>
<entry>
<title>NAND: Mark the BBT as scanned prior to calling scan_bbt.</title>
<updated>2008-12-16T20:40:34+00:00</updated>
<author>
<name>Scott Wood</name>
<email>scottwood@freescale.com</email>
</author>
<published>2008-12-16T20:24:16+00:00</published>
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Otherwise, recursion can occur if scan_bbt does not find a bad block
table, and tries to write one, and the attempt to erase the BBT area
causes a bad block check.

Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
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<pre>
Otherwise, recursion can occur if scan_bbt does not find a bad block
table, and tries to write one, and the attempt to erase the BBT area
causes a bad block check.

Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
</pre>
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</entry>
<entry>
<title>NAND: Fix misplaced return statement in nand_{read,write}_skip_bad().</title>
<updated>2008-11-25T16:47:02+00:00</updated>
<author>
<name>Scott Wood</name>
<email>scottwood@freescale.com</email>
</author>
<published>2008-11-25T16:47:02+00:00</published>
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This caused the operation to be needlessly repeated if there were
no bad blocks and no errors.

Signed-off-by: Valeriy Glushkov &lt;gvv@lstec.com&gt;
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
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<pre>
This caused the operation to be needlessly repeated if there were
no bad blocks and no errors.

Signed-off-by: Valeriy Glushkov &lt;gvv@lstec.com&gt;
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
</pre>
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</entry>
<entry>
<title>NAND: Properly create JFFS2 cleanmarkers.</title>
<updated>2008-10-29T19:20:26+00:00</updated>
<author>
<name>Scott Wood</name>
<email>scottwood@freescale.com</email>
</author>
<published>2008-10-29T19:20:26+00:00</published>
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As reported by Ilko Iliev &lt;iliev@ronetix.at&gt;, the "nand erase clean"
command is currently broken, and among other things causes all blocks
to be marked bad.

This implements it properly using MTD_OOB_AUTO, along with some
indentation fixes.

Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
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<pre>
As reported by Ilko Iliev &lt;iliev@ronetix.at&gt;, the "nand erase clean"
command is currently broken, and among other things causes all blocks
to be marked bad.

This implements it properly using MTD_OOB_AUTO, along with some
indentation fixes.

Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
</pre>
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</entry>
<entry>
<title>NAND fsl elbc: Set FMR[ECCM] based on page size.</title>
<updated>2008-10-29T18:42:41+00:00</updated>
<author>
<name>Scott Wood</name>
<email>scottwood@freescale.com</email>
</author>
<published>2008-10-29T18:42:41+00:00</published>
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Hardware expects ECCM 0 for small page and ECCM 1 for large page
when booting from NAND, so use those defaults.

Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
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<pre>
Hardware expects ECCM 0 for small page and ECCM 1 for large page
when booting from NAND, so use those defaults.

Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
</pre>
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</content>
</entry>
<entry>
<title>Make Freescale local bus registers available for both 83xx and 85xx.</title>
<updated>2008-10-29T16:12:53+00:00</updated>
<author>
<name>Haiying Wang</name>
<email>Haiying.Wang@freescale.com</email>
</author>
<published>2008-10-29T15:05:55+00:00</published>
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- Rename lbus83xx_t to fsl_lbus_t and move it to asm/fsl_lbc.h so that it
  can be shared by both 83xx and 85xx
- Remove lbus83xx_t and replace it with fsl_lbus_t in all 83xx boards
  files which use lbus83xx_t.
- Move FMR, FIR, FCR, FPAR, LTESR from mpc83xx.h to asm/fsl_lbc.h so that
  85xx can share them.

Signed-off-by: Jason Jin &lt;Jason.Jin@freescale.com&gt;
Signed-off-by: Haiying Wang &lt;Haiying.Wang@freescale.com&gt;
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
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- Rename lbus83xx_t to fsl_lbus_t and move it to asm/fsl_lbc.h so that it
  can be shared by both 83xx and 85xx
- Remove lbus83xx_t and replace it with fsl_lbus_t in all 83xx boards
  files which use lbus83xx_t.
- Move FMR, FIR, FCR, FPAR, LTESR from mpc83xx.h to asm/fsl_lbc.h so that
  85xx can share them.

Signed-off-by: Jason Jin &lt;Jason.Jin@freescale.com&gt;
Signed-off-by: Haiying Wang &lt;Haiying.Wang@freescale.com&gt;
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
</pre>
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</entry>
<entry>
<title>NAND: Reset chip on power-up</title>
<updated>2008-10-29T15:42:17+00:00</updated>
<author>
<name>Karl Beldan</name>
<email>karl.beldan@gmail.com</email>
</author>
<published>2008-09-15T14:08:03+00:00</published>
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Some chips require a RESET after power-up (e.g. Micron MT29FxGxxxxx).
The first command sent is NAND_CMD_READID.
Issue a NAND_CMD_RESET in nand_scan_ident before reading the device id.
Tested with an MT29F4G08AAC.

Signed-off-by: Karl Beldan &lt;karl.beldan@gmail.com&gt;
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
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<pre>
Some chips require a RESET after power-up (e.g. Micron MT29FxGxxxxx).
The first command sent is NAND_CMD_READID.
Issue a NAND_CMD_RESET in nand_scan_ident before reading the device id.
Tested with an MT29F4G08AAC.

Signed-off-by: Karl Beldan &lt;karl.beldan@gmail.com&gt;
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
</pre>
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</entry>
<entry>
<title>NAND: sync with 2.6.27</title>
<updated>2008-10-29T15:42:16+00:00</updated>
<author>
<name>Scott Wood</name>
<email>scottwood@freescale.com</email>
</author>
<published>2008-10-24T21:20:43+00:00</published>
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This brings the core NAND code up to date with the Linux kernel.

Since there were several drivers in Linux as of the last update that are
not in u-boot, I'm not bringing over new drivers that have been added
since in the absence of an interested party.

I did not update OneNAND since it was recently synced by Kyungmin Park,
and I'm not sure exactly what the common ancestor is.

Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
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<pre>
This brings the core NAND code up to date with the Linux kernel.

Since there were several drivers in Linux as of the last update that are
not in u-boot, I'm not bringing over new drivers that have been added
since in the absence of an interested party.

I did not update OneNAND since it was recently synced by Kyungmin Park,
and I'm not sure exactly what the common ancestor is.

Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
</pre>
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</entry>
<entry>
<title>rename CFG_ macros to CONFIG_SYS</title>
<updated>2008-10-18T19:54:03+00:00</updated>
<author>
<name>Jean-Christophe PLAGNIOL-VILLARD</name>
<email>plagnioj@jcrosoft.com</email>
</author>
<published>2008-10-16T13:01:15+00:00</published>
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;
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Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;
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