u-boot.git/drivers/mtd/nand, branch v2016.09

Merge branch 'master' of git://www.denx.de/git/u-boot-imx

2016-09-09T13:45:32Z

mtd: nand: mxs: fix cache alignment for cache lines >32

2016-09-06T16:22:48Z

Currently the command buffer gets allocated with a size of 32 bytes. This causes warning messages on systems with cache lines bigger than 32 bytes: CACHE: Misaligned operation at range [9df17a00, 9df17a20] Define command buffer to be at least 32 bytes, but more if cache line is bigger. Signed-off-by: Stefan Agner Reviewed-by: Stefano Babic

nand: Fix some more NULL name tests

2016-09-02T01:08:48Z

Now that nand_info[] is an array of pointers we need to test the pointer itself rather than using name as a proxy for NULLness. Fixes: b616d9b0a708eb9 ("nand: Embed mtd_info in struct nand_chip") Signed-off-by: Scott Wood Cc: Lukasz Majewski Cc: Tony Lindgren Acked-by: Tony Lindgren

mtd: nand: pxa3xx: use nand_set_controller_data

2016-09-01T22:30:11Z

In commit 17cb4b8f327e ("mtd: nand: Add+use mtd_to/from_nand and nand_get/set_controller_data") the assignment of mtd->priv was removed but was not replaced. This adds the required nand_set_controller_data() call. Signed-off-by: Chris Packham

mtd: nand: fix bug writing 1 byte less than page size

2016-07-25T01:36:29Z

nand_do_write_ops() determines if it is writing a partial page with the formula: part_pagewr = (column || writelen < (mtd->writesize - 1)) When 'writelen' is exactly 1 byte less than the NAND page size the formula equates to zero, so the code doesn't process it as a partial write, although it should. As a consequence the function remains in the while(1) loop with 'writelen' becoming 0xffffffff and iterating until the watchdog timeout triggers. To reproduce the issue on a NAND with 2K page (0x800): => nand erase.part => nand write $loadaddr 7ff Signed-off-by: Hector Palacios

mtd: nand: Add a full-id entry for the H27QCG8T2E5R‐BCF NAND

2016-07-25T01:36:28Z

Add a full-id entry for the H27QCG8T2E5R‐BCF NAND. Signed-off-by: Boris Brezillon Acked-by: Hans de Goede

mtd: nand: Add the sunxi NAND controller driver

2016-07-25T01:36:28Z

We already have an SPL driver for the sunxi NAND controller, now add the normal/standard one. The source has been copied from Linux 4.6 with a few changes to make it work in u-boot. Signed-off-by: Boris Brezillon Acked-by: Hans de Goede

mtd: nand: add common DT init code

2016-07-25T01:36:28Z

These are already-documented common bindings for NAND chips. Let's handle them in nand_base. If NAND controller drivers need to act on this data before bringing up the NAND chip (e.g., fill out ECC callback functions, change HW modes, etc.), then they can do so between calling nand_scan_ident() and nand_scan_tail(). The original commit has been slightly reworked to use the fdtdec_xxx() helpers (instead of the of_xxxx() ones). Signed-off-by: Brian Norris Signed-off-by: Boris Brezillon Acked-by: Hans de Goede

armv7: make gpmc_cfg const

2016-07-22T18:46:00Z

Signed-off-by: Ladislav Michl [trini: Adapt am33xx, duovero, omap_zoom1] Signed-off-by: Tom Rini Signed-off-by: Tom Rini

nand_spl_simple: Add a simple NAND read function

2016-07-22T13:52:59Z

To support UBI in SPL we need a simple NAND read function. Add one to nand_spl_simple and keep it as simple as it goes. Signed-off-by: Thomas Gleixner Signed-off-by: Ladislav Michl Acked-by: Scott Wood Reviewed-by: Tom Rini Reviewed-by: Heiko Schocher