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<title>u-boot.git/drivers/mtd/spi, branch v2013.04</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/mtd/spi?h=v2013.04</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/drivers/mtd/spi?h=v2013.04'/>
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<updated>2013-03-28T17:50:01Z</updated>
<entry>
<title>Merge branch 'u-boot/master' into 'u-boot-arm/master'</title>
<updated>2013-03-28T17:50:01Z</updated>
<author>
<name>Albert ARIBAUD</name>
<email>albert.u.boot@aribaud.net</email>
</author>
<published>2013-03-28T17:50:01Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=009d75ccc11d27b9a083375a88bb93cb746b4800'/>
<id>urn:sha1:009d75ccc11d27b9a083375a88bb93cb746b4800</id>
<content type='text'>
Conflicts:
	drivers/spi/tegra20_sflash.c
	include/fdtdec.h
	lib/fdtdec.c
</content>
</entry>
<entry>
<title>sf: winbond: add W25Q32DW</title>
<updated>2013-03-25T16:56:06Z</updated>
<author>
<name>Allen Martin</name>
<email>amartin@nvidia.com</email>
</author>
<published>2013-03-16T18:58:08Z</published>
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<id>urn:sha1:772ba15474f73adc942e817cc072b6e9750836cc</id>
<content type='text'>
Add support for Winbond W25Q32DW 32Mbit part

Signed-off-by: Allen Martin &lt;amartin@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
Reviewed-by: Stephen Warren &lt;swarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>sf: Enable FDT-based configuration and memory mapping</title>
<updated>2013-03-19T15:45:37Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2013-03-11T06:08:08Z</published>
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<id>urn:sha1:bb8215f437a7c948eec82a6abe754c226978bd6d</id>
<content type='text'>
Enable device tree control of SPI flash, and use this to implement
memory-mapped SPI flash, which is supported on Intel chips.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>sf: Respect maximum SPI write size</title>
<updated>2013-03-19T15:45:37Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2013-03-11T06:08:06Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1e566bc6dbcfc9f13909d5cb40dd74925bcdd579'/>
<id>urn:sha1:1e566bc6dbcfc9f13909d5cb40dd74925bcdd579</id>
<content type='text'>
Some SPI flash controllers (e.g. Intel ICH) have a limit on the number of
bytes that can be in a write transaction. Support this by breaking the
writes into multiple transactions.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>sf: Use spi_flash_alloc() in each SPI flash driver</title>
<updated>2013-03-19T15:45:36Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2013-03-11T06:08:03Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=c0f87dd4ffa0c012d1dc8f737412c58200a93c93'/>
<id>urn:sha1:c0f87dd4ffa0c012d1dc8f737412c58200a93c93</id>
<content type='text'>
Rather than each device having its own way to allocate a SPI flash
structure, use the new allocation function everywhere. This will make it
easier to extend the interface without breaking devices.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>sf: Add spi_flash_alloc() to create a new SPI flash struct</title>
<updated>2013-03-19T15:45:36Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2013-03-11T06:08:02Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b5aec1424d191c51f694ba85d5577e7a635363d9'/>
<id>urn:sha1:b5aec1424d191c51f694ba85d5577e7a635363d9</id>
<content type='text'>
At present it is difficult to extend the SPI flash structure since
all devices allocate it themselves, and few of them zero all fields.
Add a new function spi_flash_alloc() which can be used by SPI devices
to perform this allocation, and thus ensure that all devices can
better cope with SPI structure changes.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>sf: stmicro: Add support for N25Q256A</title>
<updated>2013-02-06T15:10:00Z</updated>
<author>
<name>Jagannadha Sutradharudu Teki</name>
<email>jagannadha.sutradharudu-teki@xilinx.com</email>
</author>
<published>2013-01-29T11:43:38Z</published>
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<id>urn:sha1:d62ef5619c9249772247d6af3b8e65207ae0c871</id>
<content type='text'>
Add support for Numonyx N25Q256A SPI flash.

Signed-off-by: Jagannadha Sutradharudu Teki &lt;jaganna@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>sf: stmicro: Add support for N25Q32A</title>
<updated>2013-02-06T15:10:00Z</updated>
<author>
<name>Jagannadha Sutradharudu Teki</name>
<email>jagannadha.sutradharudu-teki@xilinx.com</email>
</author>
<published>2013-01-29T11:43:37Z</published>
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<id>urn:sha1:b1431dac32c43225bb63fbc77afabd7308fa7213</id>
<content type='text'>
Add support for Numonyx N25Q32A SPI flash.

Signed-off-by: Jagannadha Sutradharudu Teki &lt;jaganna@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>sf: stmicro: Add support for N25Q32</title>
<updated>2013-02-06T15:10:00Z</updated>
<author>
<name>Jagannadha Sutradharudu Teki</name>
<email>jagannadha.sutradharudu-teki@xilinx.com</email>
</author>
<published>2013-01-29T11:43:36Z</published>
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<id>urn:sha1:c75c92122f1146642c99d1f24431be3432679eb3</id>
<content type='text'>
Add support for Numonyx N25Q32 SPI flash.

Signed-off-by: Jagannadha Sutradharudu Teki &lt;jaganna@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
<entry>
<title>sf: stmicro: Add support for N25Q64A</title>
<updated>2013-02-06T15:10:00Z</updated>
<author>
<name>Jagannadha Sutradharudu Teki</name>
<email>jagannadha.sutradharudu-teki@xilinx.com</email>
</author>
<published>2013-01-23T12:51:45Z</published>
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<id>urn:sha1:f785fcb6318285b66338fa5f1701cb4bdade4c1d</id>
<content type='text'>
Add support for Numonyx N25Q64A SPI flash.

Signed-off-by: Jagannadha Sutradharudu Teki &lt;jaganna@xilinx.com&gt;
Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
</entry>
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