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<title>u-boot.git/drivers/mtd/spi, branch v2015.04</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/mtd/spi?h=v2015.04</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/drivers/mtd/spi?h=v2015.04'/>
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<updated>2015-02-12T17:35:33Z</updated>
<entry>
<title>dm: Expand and complete Kconfig in drivers/</title>
<updated>2015-02-12T17:35:33Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2015-02-06T04:41:35Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f94a1bed07e2af1c46ddcf2046cddd979ebfd994'/>
<id>urn:sha1:f94a1bed07e2af1c46ddcf2046cddd979ebfd994</id>
<content type='text'>
Expand the help messages for each driver. Add missing Kconfig for I2C,
SPI flash and thermal.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Masahiro Yamada &lt;yamada.m@jp.panasonic.com&gt;
</content>
</entry>
<entry>
<title>dm: spi: Move slave details to child platdata</title>
<updated>2015-01-30T00:09:56Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2015-01-25T15:27:12Z</published>
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<id>urn:sha1:d0cff03e187cc1de3d6b477b92c376aae27c95e8</id>
<content type='text'>
At present we go through various contortions to store the SPI slave's chip
select in its private data. This only exists when the slave is active so
must be set up when it is probed. Until the device is probed we don't
actually know what chip select it will appear on.

However, now that we can support per-child platform data, we can use that
instead. This allows us to set up the chip select when the child is bound,
and avoid the messy contortions.

Unfortunately this is a fairly large change and it seems to be difficult to
break it down further.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>dm: sandbox: sf: Tidy up the error handling in sandbox_sf_probe()</title>
<updated>2015-01-30T00:09:56Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2015-01-25T15:27:09Z</published>
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<id>urn:sha1:1603bf3cc189da65362b83b85831e094a2fe8516</id>
<content type='text'>
Use a single exit point when we have an error and add debugging there.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>sf: sf_params: Add S25FL164K flash identifier info</title>
<updated>2014-12-18T13:18:30Z</updated>
<author>
<name>Adnan Ali</name>
<email>adnan.ali@codethink.co.uk</email>
</author>
<published>2014-12-18T13:18:30Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=babe6994ca28e5a354ee32b33b7a54b0276d9df1'/>
<id>urn:sha1:babe6994ca28e5a354ee32b33b7a54b0276d9df1</id>
<content type='text'>
Add the necessary flash entry for the Spansion S25FL164K
flash. Tested on Marvell 88F6218 based design.

Signed-off-by: Ben Dooks &lt;ben.dooks@codethink.co.uk&gt;
Reviewed-by: Jagannadha Sutradharudu Teki &lt;jagannadh.teki@gmail.com&gt;
</content>
</entry>
<entry>
<title>sf: sf_params: Add S25FL116K flash support</title>
<updated>2014-12-18T13:15:35Z</updated>
<author>
<name>Adnan Ali</name>
<email>adnan.ali@codethink.co.uk</email>
</author>
<published>2014-12-18T13:15:35Z</published>
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<id>urn:sha1:cf156007e08c31d4f21614da87e6634e7ed98047</id>
<content type='text'>
Added S25FL116K flash and tested on Marvell 88F6281 based system.

Signed-off-by: Adnan Ali &lt;adnan.ali@codethink.co.uk&gt;
Reviewed-by: Jagannadha Sutradharudu Teki &lt;jagannadh.teki@gmail.com&gt;
</content>
</entry>
<entry>
<title>mtd/spi: Add support for SST25WF040B</title>
<updated>2014-12-18T12:49:24Z</updated>
<author>
<name>Shengzhou Liu</name>
<email>Shengzhou.Liu@freescale.com</email>
</author>
<published>2014-12-18T12:49:24Z</published>
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<id>urn:sha1:b45a3de086fd1e1eed792970c475ca93e8bec29a</id>
<content type='text'>
Add support for SST25WF040B-40I-SN flash.
Tested on T1024QDS board.

Signed-off-by: Shengzhou Liu &lt;Shengzhou.Liu@freescale.com&gt;
Reviewed-by: Jagannadha Sutradharudu Teki &lt;jagannadh.teki@gmail.com&gt;
</content>
</entry>
<entry>
<title>mtd: sf: Zap ramtron driver</title>
<updated>2014-12-18T12:47:54Z</updated>
<author>
<name>Jagannadha Sutradharudu Teki</name>
<email>jagannadh.teki@gmail.com</email>
</author>
<published>2014-11-06T10:35:35Z</published>
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<id>urn:sha1:2bf48026fd5ab324f673d4b0a15c049d5d45bcd6</id>
<content type='text'>
Removed ramtron driver since the EMK boards are
no longer been active, and these are the only boards
used this flash driver.

Commit details for EMK zap:
"ppc/arm: zap EMK boards"
(sha1: d58a9451e7339ed4cf2b2627e534611f427fb791)

Signed-off-by: Jagannadha Sutradharudu Teki &lt;jagannadh.teki@gmail.com&gt;
Cc: Reinhard Meyer &lt;reinhard.meyer@emk-elektronik.de&gt;
</content>
</entry>
<entry>
<title>sf: Enable byte program support</title>
<updated>2014-12-13T22:08:04Z</updated>
<author>
<name>Jagannadha Sutradharudu Teki</name>
<email>jagannadh.teki@gmail.com</email>
</author>
<published>2014-12-12T14:06:14Z</published>
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<id>urn:sha1:54ba653ab63b31c8f5405fb0ee9dfba05cbb1521</id>
<content type='text'>
Enabled byte program support for sst flashes in sf.

Few controllers will only support BP, so this patch gives
a tx transfer flag to set the BP so-that sf will operate
on byte program transfer.

A new TX operation mode SPI_OPM_TX_BP is introduced for such SPI
controller to use byte program op for SST flash.

Signed-off-by: Jagannadha Sutradharudu Teki &lt;jagannadh.teki@gmail.com&gt;
Tested-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
</content>
</entry>
<entry>
<title>spi: sf: Support byte program for sst spi flash</title>
<updated>2014-12-13T22:08:04Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2014-12-12T14:06:13Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=74c2cee4e82bb71953267e87900e279ab5aa1dc3'/>
<id>urn:sha1:74c2cee4e82bb71953267e87900e279ab5aa1dc3</id>
<content type='text'>
Currently if SST flash advertises SST_WP flag in the params table
the word program command (ADh) with auto address increment will be
used for the flash write op. However some SPI controllers do not
support the word program command (like the Intel ICH 7), the byte
programm command (02h) has to be used.

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Acked-by: Simon Glass &lt;sjg@chromium.org&gt;
Tested-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Jagannadha Sutradharudu Teki &lt;jagannadh.teki@gmail.com&gt;
</content>
</entry>
<entry>
<title>spi: Fix flag collision for SST_WP</title>
<updated>2014-12-13T22:08:04Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2014-12-12T14:06:12Z</published>
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<id>urn:sha1:b648742a17c16639976ac5b38f246cb0f7d41da5</id>
<content type='text'>
At present SECT_4K is the same as SST_WP so we cannot tell these apart. Fix
this so that the table in sf_params.c can be used correctly.

Reported-by: Jens Rottmann &lt;Jens.Rottmann@adlinktech.com&gt;
Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Jagannadha Sutradharudu Teki &lt;jagannadh.teki@gmail.com&gt;
</content>
</entry>
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