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<title>u-boot.git/drivers/mtd/spi, branch v2017.11</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/mtd/spi?h=v2017.11</id>
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<updated>2017-10-25T08:05:05Z</updated>
<entry>
<title>SPL: SPI: select SPL_SPI_FLASH_SUPPORT on SPL_SPI_SUNXI</title>
<updated>2017-10-25T08:05:05Z</updated>
<author>
<name>Andre Przywara</name>
<email>andre.przywara@arm.com</email>
</author>
<published>2017-10-04T23:27:21Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=a722359de4e1f68ad2392b2eb88cfca55f129637'/>
<id>urn:sha1:a722359de4e1f68ad2392b2eb88cfca55f129637</id>
<content type='text'>
The Allwinner SPI flash SPL boot support is guarded by the SPL_SPI_SUNXI
symbol. But despite its generic name, the actual only use case for this
is to provide SPI flash support to the SPL, which requires
CONFIG_SPL_SPI_FLASH_SUPPORT to be defined.
Select this symbol from the SPL_SPI_SUNXI Kconfig definition. This
avoids doing this explicitly in the defconfig, and fixes SPI booting on
the Pine64 SoPine (and -LTS version) and the OrangePi Win board (both with
SPI flash).

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Signed-off-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
</content>
</entry>
<entry>
<title>sf: bar: Clean BA24 Bank Address Register bit after read/write/erase operation</title>
<updated>2017-09-27T08:01:59Z</updated>
<author>
<name>Lukasz Majewski</name>
<email>lukma@denx.de</email>
</author>
<published>2017-09-25T10:40:08Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ca1ac16da097bf0ab176b1a201653553160dc042'/>
<id>urn:sha1:ca1ac16da097bf0ab176b1a201653553160dc042</id>
<content type='text'>
The content of Bank Address Register (BAR) is volatile. It is cleared
after power cycle or reset command (RESET F0h).

Some memories (like e.g. s25fl256s) use it to access memory larger than
0x1000000 (16 MiB).

The problem shows up when one:

1. Reads/writes/erases memory &gt; 16 MiB
2. Calls "reset" u-boot command (which is not causing BAR to be cleared)

In the above scenario, the SoC ROM sends 0x000000 address to read SPL.
Unfortunately, the BA24 bit is still set and hence it receives content
from 0x1000000 (16 MiB) memory address.
As a result the SoC aborts and we hang. Only power cycle can take the
SoC out of this state.

How to reproduce/test:

sf probe; sf erase 0x1200000 0x800000; reset
sf probe; sf erase 0x1200000 0x800000; sf write 0x11000000 0x1200000 0x800000; reset
sf probe; sf read 0x11000000 0x1200000 0x800000; reset

Signed-off-by: Lukasz Majewski &lt;lukma@denx.de&gt;
[Fixed comment text on clean_bar function]
Signed-off-by: Jagan Teki &lt;jagan@openedev.com&gt;
Reviewed-by: Jagan Teki &lt;jagan@openedev.com&gt;
</content>
</entry>
<entry>
<title>SPL: SPI: sunxi: add SPL FIT image support</title>
<updated>2017-09-27T07:15:32Z</updated>
<author>
<name>Andre Przywara</name>
<email>andre.przywara@arm.com</email>
</author>
<published>2017-09-22T21:57:22Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ba09440131a707c4fabf2875b14521bcf2b86938'/>
<id>urn:sha1:ba09440131a707c4fabf2875b14521bcf2b86938</id>
<content type='text'>
The sunxi-specific SPI load routine only knows how to load a legacy
U-Boot image.
Teach it how to handle FIT images as well, simply by providing the
existing SPL FIT loader with the right loader routine to access the SPI
NOR flash.

Signed-off-by: Andre Przywara &lt;andre.przywara@arm.com&gt;
Reported-by: Peter Kosa &lt;kope@madnet.sk&gt;
Acked-by: Maxime Ripard &lt;maxime.ripard@free-electrons.com&gt;
Reviewed-by: Jagan Teki &lt;jagan@openedev.com&gt;
</content>
</entry>
<entry>
<title>Fix s25fl256s position in spi_flash_ids list</title>
<updated>2017-09-25T07:30:34Z</updated>
<author>
<name>Vsevolod Gribov</name>
<email>vgribov@larch-networks.com</email>
</author>
<published>2017-09-15T14:21:07Z</published>
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<id>urn:sha1:db10809c17c7cd8960d0c45248bbef6e76251ad7</id>
<content type='text'>
Spansion S25FS256S and S25FL256S flashes have equal JEDEC ID and ext ID.
As far as S25FL256S occures in spi_flash_ids before S25FS256S, U-Boot
incorrectly detects FS flash as FL. Thus its better to compare with
S25FS256S first.

Signed-off-by: Vsevolod Gribov &lt;vgribov@larch-networks.com&gt;
[Added S-o-b]
Signed-off-by: Jagan Teki &lt;jagan@openedev.com&gt;
Reviewed-by: Jagan Teki &lt;jagan@openedev.com&gt;
</content>
</entry>
<entry>
<title>sf: Fix S25FL116K entry</title>
<updated>2017-09-25T07:24:10Z</updated>
<author>
<name>Marek Vasut</name>
<email>marex@denx.de</email>
</author>
<published>2017-09-14T21:15:10Z</published>
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<id>urn:sha1:545a43822226d151701f3bf9b668298a124fefc0</id>
<content type='text'>
The flash chip is 2 MiB , organized as 32 x 64 kiB sectors .
Rectify the entry to match the datasheet, reality and Linux SNOR IDs.

Signed-off-by: Marek Vasut &lt;marex@denx.de&gt;
Reviewed-by: Jagan Teki &lt;jagan@openedev.com&gt;
</content>
</entry>
<entry>
<title>mtd/spi: Add MT35XU512ABA1G12 NOR flash support</title>
<updated>2017-09-25T07:21:20Z</updated>
<author>
<name>Yogesh Gaur</name>
<email>yogeshnarayan.gaur@nxp.com</email>
</author>
<published>2017-08-31T04:56:31Z</published>
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<id>urn:sha1:811b6be166ee4d9eaba73ff1ae5b648d4c98b30e</id>
<content type='text'>
Add MT35XU512ABA1G12 parameters to NOR flash parameters array.

The MT35XU512ABA1G12 only supports 1 bit mode and 8 bits. It can't support
dual and quad. Supports subsector erase with 4KB granularity, have support
of FSR(flag status register) and flash size is 64MB.

Signed-off-by: Yogesh Gaur &lt;yogeshnarayan.gaur@nxp.com&gt;
Reviewed-by: Jagan Teki &lt;jagan@openedev.com&gt;
</content>
</entry>
<entry>
<title>nds32: mtd: add spi flash id MX25U16335E.</title>
<updated>2017-09-21T02:30:22Z</updated>
<author>
<name>rick</name>
<email>rick@andestech.com</email>
</author>
<published>2017-08-28T02:09:01Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6d3cb0fdcd7d29ef54651576c3d0c5fb8c789a16'/>
<id>urn:sha1:6d3cb0fdcd7d29ef54651576c3d0c5fb8c789a16</id>
<content type='text'>
To support MACRONIX MX25U1635E 16M-BIT flash.

Signed-off-by: rick &lt;rick@andestech.com&gt;
</content>
</entry>
<entry>
<title>sf: Preserve QE bit when clearing BP# bits for Macronix flash</title>
<updated>2017-08-16T12:51:50Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2017-07-23T14:44:37Z</published>
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<id>urn:sha1:294f2050c438d1e4ab39fd040d394927772048f2</id>
<content type='text'>
On some flash (like Macronix), QE (quad enable) bit is in the same
status register as BP# bits, and we need preserve its original value
during a reboot cycle as this is required by some platforms (like
Intel ICH SPI controller working under descriptor mode).

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Jagan Teki &lt;jagan@openedev.com&gt;
[Refined code for readability]
Signed-off-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
</content>
</entry>
<entry>
<title>mtd: spi: sf_dataflash: Add print message while erase error</title>
<updated>2017-08-08T07:04:27Z</updated>
<author>
<name>Wenyou.Yang@microchip.com</name>
<email>Wenyou.Yang@microchip.com</email>
</author>
<published>2017-07-21T05:26:09Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8fc2faefdd8bd950fa6ef615ab63f8ec3b6de7e5'/>
<id>urn:sha1:8fc2faefdd8bd950fa6ef615ab63f8ec3b6de7e5</id>
<content type='text'>
Add the print message to tell us why the erase operation doesn't work.

Signed-off-by: Wenyou Yang &lt;wenyou.yang@microchip.com&gt;
Reviewed-by: Simon Glass &lt;sjg@chromium.org&gt;
Reviewed-by: Jagan Teki &lt;jagan@openedev.com&gt;
</content>
</entry>
<entry>
<title>sf: Add Macronix MX25U6435F device parameters</title>
<updated>2017-08-08T06:56:05Z</updated>
<author>
<name>Bin Meng</name>
<email>bmeng.cn@gmail.com</email>
</author>
<published>2017-07-23T14:44:36Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=ac6777b1e3362a4958562a3b4315f39db75685f3'/>
<id>urn:sha1:ac6777b1e3362a4958562a3b4315f39db75685f3</id>
<content type='text'>
This adds support for Macronix flash MX25U6435F (device ID 0xc22537).

Signed-off-by: Bin Meng &lt;bmeng.cn@gmail.com&gt;
Reviewed-by: Jagan Teki &lt;jagan@openedev.com&gt;
</content>
</entry>
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