u-boot.git/drivers/mtd/spi, branch v2018.07

sf: Enable FSR polling on N25Q256(A)

2018-06-28T14:28:40Z

The N25Q256(A) datasheet clearly states that this device does have a Flag Status Register and does update FSR PEC bit 7 during Program and Erase cycles to indicate the cycle is in progress. Enable the FSR PEC bit polling on this device to prevent data corruption. Signed-off-by: Marek Vasut Cc: Jagan Teki Cc: Tom Rini

mtd: spi: Correct parameters for s25fs512s flash

2018-06-25T10:20:33Z

Change sector size to 256KiB in table spi_flash_ids. Signed-off-by: Ashish Kumar Reviewed-by: Jagan Teki

spi: sandbox: Fix memory leak in sandbox_sf_bind_emul()

2018-06-19T11:31:44Z

Move the strdup() call so that it is only done when we know we will bind the device. Reported-by: Coverity (CID: 131216) Signed-off-by: Simon Glass

sf: Add support for gd25q32b gigadevice flash

2018-06-04T18:10:04Z

This flash IC is used in some chromebook models manufactured by Bitland. Signed-off-by: Carlo Caione Reviewed-by: Jagan Teki

sf: Set current flash bank to 0 in clean_bar()

2018-06-04T18:01:37Z

The clean_bar() function resets the SPI NOR BAR register to 0, but does not set the flash->curr_bar to 0 , therefore those two can get out of sync, which could ultimatelly result in corrupted flash content. The simplest test case is this: => mw 0x10000000 0x1234abcd 0x4000 => sf probe => sf erase 0x1000000 0x10000 => sf write 0x10000000 0x1000000 0x10000 => sf probe ; sf read 0x12000000 0 0x10000 ; md 0x12000000 That is, erase a sector above the 16 MiB boundary and write it with random pre-configured data. What will actually happen without this patch is the sector will be erased, but the data will be written to BAR 0 offset 0x0 in the flash. This is because the erase command will call write_bar()+clean_bar(), which will leave flash->bank_curr = 1 while the hardware BAR registers will be set to 0 through clean_bar(). The subsequent write will also trigger write_bar()+clean_bar(), but write_bar checks if the target bank == flash->bank_curr and if so, does NOT reconfigure the BAR in the SPI NOR. Since flash->bank_curr is still 1 and out of sync with the HW, the condition matches, BAR programming is skipped and write ends up at address 0x0, thus corrupting flash content. Signed-off-by: Marek Vasut Cc: Tom Rini Reviewed-by: Jagan Teki

sf: Add Macronix MX25U25635F ID

2018-05-29T04:35:52Z

Add ID for the Macronix MX25U25635F flash. Signed-off-by: Marek Vasut Reviewed-by: Jagan Teki

sf: Add Winbond W25Q256 ID

2018-05-29T04:35:32Z

Add ID for the Winbond W25Q256 flash. Signed-off-by: Marek Vasut Reviewed-by: Jagan Teki

sf: Default page size Spansion flash "S25FS512S" is 256b

2018-05-16T13:26:49Z

page size for JEDEC EXT starting 0x4d00 is 512b, except JEDEC ID 0x215, 0x216 and 0x220 Signed-off-by: Ashish Kumar [jagan: added proper commit message] Signed-off-by: Jagan Teki Reviewed-by: Jagan Teki

sf: Add support for ISSI is25wp

2018-05-16T13:20:25Z

Added support for is25wp032, is25wp064 and is25wp128. Signed-off-by: Kimmo Rautkoski Reviewed-by: Jagan Teki

SPDX: Convert all of our single license tags to Linux Kernel style

2018-05-07T13:34:12Z

When U-Boot started using SPDX tags we were among the early adopters and there weren't a lot of other examples to borrow from. So we picked the area of the file that usually had a full license text and replaced it with an appropriate SPDX-License-Identifier: entry. Since then, the Linux Kernel has adopted SPDX tags and they place it as the very first line in a file (except where shebangs are used, then it's second line) and with slightly different comment styles than us. In part due to community overlap, in part due to better tag visibility and in part for other minor reasons, switch over to that style. This commit changes all instances where we have a single declared license in the tag as both the before and after are identical in tag contents. There's also a few places where I found we did not have a tag and have introduced one. Signed-off-by: Tom Rini