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mtd: spi-nor: Add gd55lb02gf chips

2026-07-01T18:42:41Z

Add the GigaDevice GD55LB02GF (256 Mo) similar to gd55lb02ge with the same read path flags. SPI_NOR_HAS_LOCK and SPI_NOR_HAS_TB do not match this chip's status register layout: the GD55LB02GF uses a 5-bit block protect field BP0..BP4 plus a CMP bit in SR2 for direction (see datasheet "Status Register Block Protection"). The generic stm-lock helpers drive only BP0..BP2 and assume SR1 bit 5 is TB, but on this part SR1 bit 5 is BP3. Enabling either flag would leave BP3..BP4 unmanaged or corrupt BP3 on every lock op. A proper support needs a vendor specific lock callback, it is out of scope for this table update. Signed-off-by: Vincent Jardin Suggested-by: Takahiro Kuwano Reviewed-by: Takahiro Kuwano

Kconfig: mtd: restyle

2026-06-25T20:53:19Z

Restyle all Kconfigs for "mtd": Menu entries : no space left Menu attributes: 1 TAB Help text : 1 TAB + 2 spaces Replace '---help---' by 'help' Signed-off-by: Johan Jonker [trini: Add missing indentation on a few more multi-paragraph help texts] Signed-off-by: Tom Rini

mtd: nand: pxa3xx: Pass valid dev to dev_err()

2026-06-10T09:23:26Z

info->controller.active is not initialised so the dev_err() call ends up dereferencing a null pointer causing a crash instead of outputting the error. Add a dev member to struct pxa3xx_nand_info and use that instead of info->controller.active->mtd.dev. Fixes: 661c98121d49 ("mtd: nand: pxa3xx: Fix not calling dev_xxx with a device") Signed-off-by: Chris Packham Reviewed-by: Stefan Roese

mtd: spi: bootstd: Staticize and constify driver ops

2026-05-18T22:56:07Z

Set the ops structure as static const. The structure is not accessible from outside of this driver and is not going to be modified at runtime. Signed-off-by: Marek Vasut Reviewed-by: Simon Glass Reviewed-by: Takahiro Kuwano

mtd: nand: raw: sunxi_spl: remove user data length reset

2026-05-01T12:49:44Z

No need to reset user data length registers in SPL. In SPL, only the first user data length register is used, so we don't need to reset all of them. Signed-off-by: Richard Genoud Acked-by: Andre Przywara

mtd: rawnand: sunxi: introduce variable user data length

2026-05-01T12:49:44Z

In Allwinner SoCs, user data can be added in OOB before each ECC data. For older SoCs like A10, the user data size was the size of a register (4 bytes) and was mandatory before each ECC step. So, the A10 OOB Layout is: [4Bytes USER_DATA_STEP0] [ECC_STEP0 bytes] [4bytes USER_DATA_STEP1] [ECC_STEP1 bytes] ... NB: the BBM is stored at the beginning of the USER_DATA_STEP0. Now, for H6/H616 NAND flash controller, this user data can have a different size for each step. So, we are maximizing the user data length to use as many OOB bytes as possible. Fixes: 7d1de9801151 ("mtd: rawnand: sunxi_spl: add support for H6/H616 nand controller") Fixes: f163da5e6d26 ("mtd: rawnand: sunxi: add support for H6/H616 nand controller") Signed-off-by: Richard Genoud

mtd: rawnand: sunxi: clean sunxi_nand_chip_init()

2026-05-01T12:49:37Z

In sunxi_nand_chip_init there's quite a lot of kfree/return, it's easy to forget a kfree(), so use a goto/kfree instead. Signed-off-by: Richard Genoud [Andre: rename goto label, keep return 0;] Reviewed-by: Andre Przywara Signed-off-by: Andre Przywara

mtd: rawnand: sunxi: make the code mode self-explanatory

2026-04-30T22:35:59Z

In sunxi_nfc_hw_ecc_{read,write}_chunk(), the ECC step was force to 0, the reason is not trivial to get when reading the code. The explanation is that, from the NAND flash controller perspective, we are indeed at step 0 for user data length and ECC errors. Just add a const value with an explanation to clarify things. Signed-off-by: Richard Genoud Reviewed-By: Michael Trimarchi Acked-by: Andre Przywara

mtd: rawnand: sunxi: Replace hard coded value by a define

2026-04-30T22:35:59Z

The user data length (4) used all over the code hard coded. And sometimes, it's not that trivial to know that it's the user data length and not something else. Moreover, for the H6/H616 this value is no more fixed by hardware, but could be modified. Using a define here makes the code more readable. Suggested-by: Miquel Raynal Reviewed-by: Michael Trimarchi Signed-off-by: Richard Genoud Acked-by: Andre Przywara

mtd: spi-nor-ids: add flags for mx25u12835f

2026-04-15T20:45:18Z

Add some capability flags for mx25u12835f. In particular, we are interested in using the lock feature. According to the datasheet, dual/quad read is also supported. Signed-off-by: David Lechner