u-boot.git/drivers/mtd, branch v2008.10

Fix the NAND size overflow issue.

2008-10-14T11:27:16+00:00

When the total size of all NAND devices exceeds 4 GiB, the size  will
overflow. This patch tries to fix this.

Note that we still have a problem when a single NAND device is bigger
than 4 GiB: then the overflow would actually happen earlier, i. e.
when storing the size in nand_info[].size, as nand_info[].size is an
"u_int32_t".

Signed-off-by: Jason Jin 
Signed-off-by: Wolfgang Denk

CFI: cfi_flash write fix for AMD legacy

2008-10-13T11:51:21+00:00

The flash_unlock_seq requires a sector for AMD_LEGACY.
Fix a retcode check typeo.

Signed-off-by: Ed Swarthout 
Signed-off-by: Stefan Roese

cfi_flash: do not reset flash when probe fails

2008-10-02T08:30:32+00:00

The CFI flash driver starts at flash_init() which calls down into
flash_get_size().  This starts by calling flash_detect_cfi().  If said
function fails, flash_get_size() finishes by attempting to reset the
flash.  Unfortunately, it does this with an info->portwidth set to 0x10
which filters down into flash_make_cmd() and that happily smashes the
stack by sticking info->portwidth bytes into a cfiword_t variable that
lives on the stack.  On a 64bit system you probably won't notice, but
killing the last 8 bytes on a 32bit system usually leads to a corrupt
return address.  Which is what happens on a Blackfin system.

Signed-off-by: Mike Frysinger 
Signed-off-by: Stefan Roese

Merge branch 'master' of git://git.denx.de/u-boot-nand-flash

2008-09-12T23:45:56+00:00

fsl_elbc_nand: ecclayout cleanups

2008-09-12T19:58:33+00:00

This patch deletes oobavail assignments, they're calculated by the nand
core code in nand_scan_tail, plus current oobavail values are wrong for
the LP NANDs.

Signed-off-by: Anton Vorontsov 
Signed-off-by: David Woodhouse 
Signed-off-by: Scott Wood

fsl_elbc_nand: implement support for flash-based BBT

2008-09-12T19:57:20+00:00

This patch implements support for flash-based BBT for chips working
through ELBC NAND controller, so that NAND core will not have to re-scan
for bad blocks on every boot.

Because ELBC controller may provide HW-generated ECCs we should adjust
bbt pattern and bbt version positions in the OOB free area.

Signed-off-by: Anton Vorontsov 
Signed-off-by: David Woodhouse 
Signed-off-by: Scott Wood

fsl_elbc_nand: fix OOB workability for large page NAND chips

2008-09-12T19:56:03+00:00

For large page chips, nand_bbt is looking into OOB area, and checking
for "0xff 0xff" pattern at OOB offset 0. That is, two bytes should be
reserved for bbt means.

But ELBC driver is specifying ecclayout so that oobfree area starts at
offset 1, so only one byte left for the bbt purposes.

This causes problems with any OOB users, namely JFFS2: after first mount
JFFS2 will fill all OOBs with "erased marker", so OOBs will contain:

  OOB Data: ff 19 85 20 03 00 ff ff ff 00 00 08 ff ff ff ff
  OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
  OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
  OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff

And on the next boot, NAND core will rescan for bad blocks, then will
see "0xff 0x19" pattern, and will mark all blocks as bad ones.

To fix the issue we should implement our own bad block pattern: just one
byte at OOB start. Though, this will work only for x8 chips. For x16
chips two bytes must be checked. Since ELBC driver does not support x16
NANDs (yet), we're safe for now.

Signed-off-by: Anton Vorontsov 
Signed-off-by: David Woodhouse 
Signed-off-by: Scott Wood

rename CFG_ENV macros to CONFIG_ENV

2008-09-10T20:48:06+00:00

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD

rename CFG_ENV_IS_IN_FLASH in CONFIG_ENV_IS_IN_FLASH

2008-09-10T20:48:04+00:00

Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD

Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx

2008-09-10T09:07:35+00:00