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<title>u-boot.git/drivers/mtd, branch v2008.10-rc2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/mtd?h=v2008.10-rc2</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/drivers/mtd?h=v2008.10-rc2'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2008-09-12T23:45:56Z</updated>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-nand-flash</title>
<updated>2008-09-12T23:45:56Z</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2008-09-12T23:45:56Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=508eb85db7065e34948c189c83f7e348c1cfd61e'/>
<id>urn:sha1:508eb85db7065e34948c189c83f7e348c1cfd61e</id>
<content type='text'>
</content>
</entry>
<entry>
<title>fsl_elbc_nand: ecclayout cleanups</title>
<updated>2008-09-12T19:58:33Z</updated>
<author>
<name>Anton Vorontsov</name>
<email>avorontsov@ru.mvista.com</email>
</author>
<published>2008-06-27T19:04:20Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=0008b6d968160abe2bfd936493f3a516a7c8da20'/>
<id>urn:sha1:0008b6d968160abe2bfd936493f3a516a7c8da20</id>
<content type='text'>
This patch deletes oobavail assignments, they're calculated by the nand
core code in nand_scan_tail, plus current oobavail values are wrong for
the LP NANDs.

Signed-off-by: Anton Vorontsov &lt;avorontsov@ru.mvista.com&gt;
Signed-off-by: David Woodhouse &lt;David.Woodhouse@intel.com&gt;
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
</content>
</entry>
<entry>
<title>fsl_elbc_nand: implement support for flash-based BBT</title>
<updated>2008-09-12T19:57:20Z</updated>
<author>
<name>Anton Vorontsov</name>
<email>avorontsov@ru.mvista.com</email>
</author>
<published>2008-06-27T19:04:13Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=8f42bf1c393d53a70c2545e9f329d11c46d74794'/>
<id>urn:sha1:8f42bf1c393d53a70c2545e9f329d11c46d74794</id>
<content type='text'>
This patch implements support for flash-based BBT for chips working
through ELBC NAND controller, so that NAND core will not have to re-scan
for bad blocks on every boot.

Because ELBC controller may provide HW-generated ECCs we should adjust
bbt pattern and bbt version positions in the OOB free area.

Signed-off-by: Anton Vorontsov &lt;avorontsov@ru.mvista.com&gt;
Signed-off-by: David Woodhouse &lt;David.Woodhouse@intel.com&gt;
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
</content>
</entry>
<entry>
<title>fsl_elbc_nand: fix OOB workability for large page NAND chips</title>
<updated>2008-09-12T19:56:03Z</updated>
<author>
<name>Anton Vorontsov</name>
<email>avorontsov@ru.mvista.com</email>
</author>
<published>2008-06-27T19:04:04Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=97ae023648e764f794ffb9c52da109d6caf09c47'/>
<id>urn:sha1:97ae023648e764f794ffb9c52da109d6caf09c47</id>
<content type='text'>
For large page chips, nand_bbt is looking into OOB area, and checking
for "0xff 0xff" pattern at OOB offset 0. That is, two bytes should be
reserved for bbt means.

But ELBC driver is specifying ecclayout so that oobfree area starts at
offset 1, so only one byte left for the bbt purposes.

This causes problems with any OOB users, namely JFFS2: after first mount
JFFS2 will fill all OOBs with "erased marker", so OOBs will contain:

  OOB Data: ff 19 85 20 03 00 ff ff ff 00 00 08 ff ff ff ff
  OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
  OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff
  OOB Data: ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff ff

And on the next boot, NAND core will rescan for bad blocks, then will
see "0xff 0x19" pattern, and will mark all blocks as bad ones.

To fix the issue we should implement our own bad block pattern: just one
byte at OOB start. Though, this will work only for x8 chips. For x16
chips two bytes must be checked. Since ELBC driver does not support x16
NANDs (yet), we're safe for now.

Signed-off-by: Anton Vorontsov &lt;avorontsov@ru.mvista.com&gt;
Signed-off-by: David Woodhouse &lt;David.Woodhouse@intel.com&gt;
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
</content>
</entry>
<entry>
<title>rename CFG_ENV macros to CONFIG_ENV</title>
<updated>2008-09-10T20:48:06Z</updated>
<author>
<name>Jean-Christophe PLAGNIOL-VILLARD</name>
<email>plagnioj@jcrosoft.com</email>
</author>
<published>2008-09-10T20:48:06Z</published>
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<id>urn:sha1:0e8d158664a913392cb01fb11a948d83f72e105e</id>
<content type='text'>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;
</content>
</entry>
<entry>
<title>rename CFG_ENV_IS_IN_FLASH in CONFIG_ENV_IS_IN_FLASH</title>
<updated>2008-09-10T20:48:04Z</updated>
<author>
<name>Jean-Christophe PLAGNIOL-VILLARD</name>
<email>plagnioj@jcrosoft.com</email>
</author>
<published>2008-09-10T20:48:04Z</published>
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<id>urn:sha1:5a1aceb0689e2f731491838970884a673ef7e7d3</id>
<content type='text'>
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD &lt;plagnioj@jcrosoft.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-mpc85xx</title>
<updated>2008-09-10T09:07:35Z</updated>
<author>
<name>Wolfgang Denk</name>
<email>wd@denx.de</email>
</author>
<published>2008-09-10T09:07:35Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f6808c48a5b484bfaf5a44dfd5f5db9129b71c6f'/>
<id>urn:sha1:f6808c48a5b484bfaf5a44dfd5f5db9129b71c6f</id>
<content type='text'>
</content>
</entry>
<entry>
<title>Fix printf errors under -DDEBUG</title>
<updated>2008-09-09T22:02:41Z</updated>
<author>
<name>Andrew Klossner</name>
<email>andrew@cesa.opbu.xerox.com</email>
</author>
<published>2008-08-21T14:12:26Z</published>
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<id>urn:sha1:5251469943895de4bb9a04d5053352cc22acb7d5</id>
<content type='text'>
Fix printf format-string/arg mismatches under -DDEBUG.

These warnings occur with DEBUG defined for a platform using
cpu/mpc85xx.  Users of other architectures can unearth similar
problems by adding the line "CFLAGS += -DDEBUG=1" in config.mk right
after "CFLAGS += $(call cc-option,-fno-stack-protector)".

Signed-off-by: Andrew Klossner &lt;andrew@cesa.opbu.xerox.com&gt;
Signed-off-by: Andy Fleming &lt;afleming@freescale.com&gt;
</content>
</entry>
<entry>
<title>mtd: SPI Flash: Support the STMicro Flash</title>
<updated>2008-09-09T17:57:29Z</updated>
<author>
<name>TsiChung Liew</name>
<email>Tsi-Chung.Liew@freescale.com</email>
</author>
<published>2008-08-06T21:08:41Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=7b7a869a8ba3bd6d9bffb748c91232141330f514'/>
<id>urn:sha1:7b7a869a8ba3bd6d9bffb748c91232141330f514</id>
<content type='text'>
Add MTD SPI Flash support for M25P16, M25P20, M25P32,
M25P40, M25P64, M25P80, M25P128.

Signed-off-by: Jason McMullan &lt;mcmullan@netapp.com&gt;
Signed-off-by: TsiChung Liew &lt;Tsi-Chung.Liew@freescale.com&gt;
</content>
</entry>
<entry>
<title>Update i386 code (sc520_cdp)</title>
<updated>2008-09-09T09:48:53Z</updated>
<author>
<name>Graeme Russ</name>
<email>graeme.russ@gmail.com</email>
</author>
<published>2008-09-06T21:08:42Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3ef96ded38a8d33b58b9fab9cd879d51ddac4cbd'/>
<id>urn:sha1:3ef96ded38a8d33b58b9fab9cd879d51ddac4cbd</id>
<content type='text'>
Attempt to bring i386 / sc520 inline with master

Signed-off-by: Graeme Russ &lt;graeme.russ@gmail.com&gt;
</content>
</entry>
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