<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/drivers/mtd, branch v2009.11-rc1</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/mtd?h=v2009.11-rc1</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/drivers/mtd?h=v2009.11-rc1'/>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<updated>2009-10-24T20:44:18Z</updated>
<entry>
<title>sf: add GPL-2 license info</title>
<updated>2009-10-24T20:44:18Z</updated>
<author>
<name>Mike Frysinger</name>
<email>vapier@gentoo.org</email>
</author>
<published>2009-10-09T21:12:44Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4166ee58d30ada7b298b9c941067f0341c2dccbe'/>
<id>urn:sha1:4166ee58d30ada7b298b9c941067f0341c2dccbe</id>
<content type='text'>
Some of the new spi flash files were missing explicit license lines.

Signed-off-by: Mike Frysinger &lt;vapier@gentoo.org&gt;
CC: Haavard Skinnemoen &lt;haavard.skinnemoen@atmel.com&gt;
</content>
</entry>
<entry>
<title>Clean-up of s3c24x0 nand driver</title>
<updated>2009-10-14T02:13:57Z</updated>
<author>
<name>kevin.morfitt@fearnside-systems.co.uk</name>
<email>kevin.morfitt@fearnside-systems.co.uk</email>
</author>
<published>2009-10-10T04:34:09Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=3d1988ab47cc0e265272967e07d747ec600a44c9'/>
<id>urn:sha1:3d1988ab47cc0e265272967e07d747ec600a44c9</id>
<content type='text'>
This patch re-formats the arm920t s3c24x0 nand driver in preparation for changes
to add support for the Embest SBC2440-II Board.

The changes are as follows:
- re-indent the code using Lindent
- make sure register layouts are defined using a C struct
- replace the upper-case typedef'ed C struct names with lower case
non-typedef'ed ones
- make sure registers are accessed using the proper accessor functions
- run checkpatch.pl and fix any error reports

It assumes the following patch has been applied first:
- [U-Boot][PATCH-ARM] CONFIG_SYS_HZ fix for ARM902T S3C24X0 Boards, 05/09/2009
 - patches 1/4, 2/4 and 3/4 of this series

Tested on an Embest SBC2440-II Board with local u-boot patches as I don't have
any s3c2400 or s3c2410 boards but need this patch applying before I can submit
patches for the SBC2440-II Board. Also, temporarily modified sbc2410x, smdk2400,
smdk2410 and trab configs to use the mtd nand driver (which isn't used by any
board at the moment), ran MAKEALL for all ARM9 targets and no new warnings or
errors were found.

Signed-off-by: Kevin Morfitt &lt;kevin.morfitt@fearnside-systems.co.uk&gt;
Signed-off-by: Minkyu Kang &lt;mk7.kang@samsung.com&gt;
</content>
</entry>
<entry>
<title>s5pc1xx: support onenand driver</title>
<updated>2009-10-14T02:13:55Z</updated>
<author>
<name>Minkyu Kang</name>
<email>mk7.kang@samsung.com</email>
</author>
<published>2009-10-01T08:20:08Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4678d674f0cacc983dca7f6b9933cd8291c9797c'/>
<id>urn:sha1:4678d674f0cacc983dca7f6b9933cd8291c9797c</id>
<content type='text'>
This patch includes the onenand driver for s5pc100

Signed-off-by: Minkyu Kang &lt;mk7.kang@samsung.com&gt;
Signed-off-by: Kyungmin Park &lt;kyungmin.park@samsung.com&gt;
</content>
</entry>
<entry>
<title>Conditionally perform common relocation fixups</title>
<updated>2009-10-03T08:17:57Z</updated>
<author>
<name>Peter Tyser</name>
<email>ptyser@xes-inc.com</email>
</author>
<published>2009-09-21T16:20:36Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=521af04d853361b49344b61892eb0618f9f713c5'/>
<id>urn:sha1:521af04d853361b49344b61892eb0618f9f713c5</id>
<content type='text'>
Add #ifdefs where necessary to not perform relocation fixups.  This
allows boards/architectures which support relocation to trim a decent
chunk of code.

Note that this patch doesn't add #ifdefs to architecture-specific code
which does not support relocation.

Signed-off-by: Peter Tyser &lt;ptyser@xes-inc.com&gt;
</content>
</entry>
<entry>
<title>NAND: davinci: Fix warnings when 4-bit ECC not used</title>
<updated>2009-09-28T21:33:18Z</updated>
<author>
<name>Scott Wood</name>
<email>scottwood@freescale.com</email>
</author>
<published>2009-09-28T21:33:18Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d44e9c1736283f0abc5d3c5d28cfea8480c93a79'/>
<id>urn:sha1:d44e9c1736283f0abc5d3c5d28cfea8480c93a79</id>
<content type='text'>
I accidentally left v2 of "NAND: DaVinci:Adding 4 BIT ECC support"
applied when I pushed the tree last merge window, and missed these fixes
which were in v3 of that patch.

Signed-off-by: Sandeep Paulraj &lt;s-paulraj@ti.com&gt;
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
</content>
</entry>
<entry>
<title>mpc512x. Micron nand flash needs a reset before a read command is issued.</title>
<updated>2009-09-22T20:59:42Z</updated>
<author>
<name>Paul Gibson</name>
<email>paul.gibson2074@gmail.com</email>
</author>
<published>2009-09-16T00:05:00Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d3f4941874a20d8a390a36ba71335ae1db2f9ba0'/>
<id>urn:sha1:d3f4941874a20d8a390a36ba71335ae1db2f9ba0</id>
<content type='text'>
Micron nand flash needs a reset before a read command is issued.
The current mpc5121_nfc driver ignores the reset command.
</content>
</entry>
<entry>
<title>ppc4xx: Big cleanup of PPC4xx defines</title>
<updated>2009-09-11T08:35:58Z</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2009-09-09T14:25:29Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=d1c3b27525b664e8c4db6bb173eed51bfc8220de'/>
<id>urn:sha1:d1c3b27525b664e8c4db6bb173eed51bfc8220de</id>
<content type='text'>
This patch cleans up multiple issues of the 4xx register (mostly
DCR, SDR, CPR, etc) definitions:

- Change lower case defines to upper case (plb4_acr -&gt; PLB4_ACR)
- Change the defines to better match the names from the
  user's manuals (e.g. cprpllc -&gt; CPR0_PLLC)
- Removal of some unused defines

Please test this patch intensive on your PPC4xx platform. Even though
I tried not to break anything and tested successfully on multiple
4xx AMCC platforms, testing on custom platforms is recommended.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
</content>
</entry>
<entry>
<title>mxc_nand: Remove Freescale's "All Rights Reserved."</title>
<updated>2009-09-04T21:03:10Z</updated>
<author>
<name>Scott Wood</name>
<email>scottwood@freescale.com</email>
</author>
<published>2009-09-02T21:45:31Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=cfcbf8c4cf3da96b9e3f652506b664bfd766a520'/>
<id>urn:sha1:cfcbf8c4cf3da96b9e3f652506b664bfd766a520</id>
<content type='text'>
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
</content>
</entry>
<entry>
<title>NAND: DaVinci: V2 Adding 4 BIT ECC support</title>
<updated>2009-08-26T20:37:03Z</updated>
<author>
<name>Sandeep Paulraj</name>
<email>s-paulraj@ti.com</email>
</author>
<published>2009-08-18T14:10:42Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=77b351cd0f20483eefa09bebebb3e0cbf5555b2c'/>
<id>urn:sha1:77b351cd0f20483eefa09bebebb3e0cbf5555b2c</id>
<content type='text'>
This patch adds 4 BIT ECC support in the DaVinci NAND
driver. Tested on both the DM355 and DM365.

Signed-off-by: Sandeep Paulraj &lt;s-paulraj@ti.com&gt;
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
</content>
</entry>
<entry>
<title>MTD:NAND: ADD new ECC mode NAND_ECC_HW_OOB_FIRST</title>
<updated>2009-08-26T20:37:03Z</updated>
<author>
<name>Sandeep Paulraj</name>
<email>s-paulraj@ti.com</email>
</author>
<published>2009-08-10T17:27:56Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f83b7f9e8a5d1334e24506ea5953dd871596ea8a'/>
<id>urn:sha1:f83b7f9e8a5d1334e24506ea5953dd871596ea8a</id>
<content type='text'>
This patch adds the new mode NAND_ECC_HW_OOB_FIRST in the nand code to
support 4-bit ECC on TI DaVinci devices with large page (up to 2K) NAND
chips.  This ECC mode is similar to NAND_ECC_HW, with the exception of
read_page API that first reads the OOB area, reads the data in chunks,
feeds the ECC from OOB area to the ECC hw engine and perform any
correction on the data as per the ECC status reported by the engine.

This patch has been accepted by Andrew Morton and can be found at

http://userweb.kernel.org/~akpm/mmotm/broken-out/mtd-nand-add-new-ecc-mode-ecc_hw_oob_first.patch

Signed-off-by: Sandeep Paulraj &lt;s-paulraj@ti.com&gt;
Signed-off-by: Sneha Narnakaje &lt;nsnehaprabha@ti.com&gt;
Signed-off-by: Scott Wood &lt;scottwood@freescale.com&gt;
</content>
</entry>
</feed>
