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<title>u-boot.git/drivers/mtd, branch v2013.04-rc2</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/mtd?h=v2013.04-rc2</id>
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<updated>2013-04-01T20:33:52Z</updated>
<entry>
<title>Consolidate bool type</title>
<updated>2013-04-01T20:33:52Z</updated>
<author>
<name>York Sun</name>
<email>yorksun@freescale.com</email>
</author>
<published>2013-04-01T18:29:11Z</published>
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<id>urn:sha1:472d546054dadacca91530bad42ad06f6408124e</id>
<content type='text'>
'bool' is defined in random places. This patch consolidates them into a
single header file include/linux/types.h, using stdbool.h introduced in C99.

All other #define, typedef and enum are removed. They are all consistent with
true = 1, false = 0.

Replace FALSE, False with false. Replace TRUE, True with true.
Skip *.py, *.php, lib/* files.

Signed-off-by: York Sun &lt;yorksun@freescale.com&gt;
</content>
</entry>
<entry>
<title>Merge branch 'u-boot/master' into 'u-boot-arm/master'</title>
<updated>2013-03-28T17:50:01Z</updated>
<author>
<name>Albert ARIBAUD</name>
<email>albert.u.boot@aribaud.net</email>
</author>
<published>2013-03-28T17:50:01Z</published>
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<id>urn:sha1:009d75ccc11d27b9a083375a88bb93cb746b4800</id>
<content type='text'>
Conflicts:
	drivers/spi/tegra20_sflash.c
	include/fdtdec.h
	lib/fdtdec.c
</content>
</entry>
<entry>
<title>sf: winbond: add W25Q32DW</title>
<updated>2013-03-25T16:56:06Z</updated>
<author>
<name>Allen Martin</name>
<email>amartin@nvidia.com</email>
</author>
<published>2013-03-16T18:58:08Z</published>
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<id>urn:sha1:772ba15474f73adc942e817cc072b6e9750836cc</id>
<content type='text'>
Add support for Winbond W25Q32DW 32Mbit part

Signed-off-by: Allen Martin &lt;amartin@nvidia.com&gt;
Signed-off-by: Tom Warren &lt;twarren@nvidia.com&gt;
Reviewed-by: Stephen Warren &lt;swarren@nvidia.com&gt;
</content>
</entry>
<entry>
<title>am33xx: Add required includes to some omap/am33xx code</title>
<updated>2013-03-24T16:49:11Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@ti.com</email>
</author>
<published>2013-03-14T11:15:25Z</published>
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<id>urn:sha1:98f92001b3af0748d02e36b515a59865fb187415</id>
<content type='text'>
- In arch/arm/cpu/armv7/omap-common/timer.c,
  drivers/mtd/nand/omap_gpmc.c and drivers/net/cpsw.c add #include files
  that the driver needs but had been relying on &lt;config.h&gt; to bring in.
- In arch/arm/cpu/armv7/omap-common/lowlevel_init.S add &lt;config.h&gt;
- In am335x_evm.h and pcm051.h don't globally include
  &lt;asm/arch/hardware.h&gt; and &lt;asm/arch/cpu.h&gt; but just &lt;asm/arch/omap.h&gt;
  as that is the only include which defines things the config uses.

Cc: Lars Poeschel &lt;poeschel@lemonage.de&gt;
Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
</content>
</entry>
<entry>
<title>sf: Enable FDT-based configuration and memory mapping</title>
<updated>2013-03-19T15:45:37Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2013-03-11T06:08:08Z</published>
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<id>urn:sha1:bb8215f437a7c948eec82a6abe754c226978bd6d</id>
<content type='text'>
Enable device tree control of SPI flash, and use this to implement
memory-mapped SPI flash, which is supported on Intel chips.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>sf: Respect maximum SPI write size</title>
<updated>2013-03-19T15:45:37Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2013-03-11T06:08:06Z</published>
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<id>urn:sha1:1e566bc6dbcfc9f13909d5cb40dd74925bcdd579</id>
<content type='text'>
Some SPI flash controllers (e.g. Intel ICH) have a limit on the number of
bytes that can be in a write transaction. Support this by breaking the
writes into multiple transactions.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>sf: Use spi_flash_alloc() in each SPI flash driver</title>
<updated>2013-03-19T15:45:36Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2013-03-11T06:08:03Z</published>
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<id>urn:sha1:c0f87dd4ffa0c012d1dc8f737412c58200a93c93</id>
<content type='text'>
Rather than each device having its own way to allocate a SPI flash
structure, use the new allocation function everywhere. This will make it
easier to extend the interface without breaking devices.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>sf: Add spi_flash_alloc() to create a new SPI flash struct</title>
<updated>2013-03-19T15:45:36Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2013-03-11T06:08:02Z</published>
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<id>urn:sha1:b5aec1424d191c51f694ba85d5577e7a635363d9</id>
<content type='text'>
At present it is difficult to extend the SPI flash structure since
all devices allocate it themselves, and few of them zero all fields.
Add a new function spi_flash_alloc() which can be used by SPI devices
to perform this allocation, and thus ensure that all devices can
better cope with SPI structure changes.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
</content>
</entry>
<entry>
<title>Merge u-boot/master into u-boot-ti/master</title>
<updated>2013-03-11T16:16:13Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@ti.com</email>
</author>
<published>2013-03-11T16:02:40Z</published>
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<id>urn:sha1:76b40ab41eff1f402ee52ba768b09daad293b9bb</id>
<content type='text'>
In master we had already taken a patch to fix the davinci GPIO code for
CONFIG_SOC_DM646X and in u-boot-ti we have additional patches to support
DA830 (which is CONFIG_SOC_DA8XX &amp;&amp; !CONFIG_SOC_DA850).  Resolve these
conflicts manually and comment the #else/#endif lines for clarity.

Conflicts:
	arch/arm/include/asm/arch-davinci/gpio.h
	drivers/gpio/da8xx_gpio.c

Signed-off-by: Tom Rini &lt;trini@ti.com&gt;
</content>
</entry>
<entry>
<title>SPL: ONENAND: Fix onenand_spl_load_image implementation.</title>
<updated>2013-03-08T21:41:14Z</updated>
<author>
<name>Enric Balletbo i Serra</name>
<email>eballetbo@iseebcn.com</email>
</author>
<published>2013-02-07T23:14:47Z</published>
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<id>urn:sha1:f99613782a41dbf1b91c19684fe9556ed02ec6d1</id>
<content type='text'>
Tested with an IGEPv2 board seems that current onenand_spl_load_image implementation
doesn't work. This patch fixes this function changing the read loop and reading the
onenand blocks from page to page.

Tested with various IGEP based boards with a OneNAND from Numonyx.

Signed-off-by: Enric Balletbo i Serra &lt;eballetbo@iseebcn.com&gt;
</content>
</entry>
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