Currently, "nand scrub" runs chip->scan_bbt at the end of
nand_erase_opts() even if NAND_SKIP_BBTSCAN flag is set.

It violates the intention of NAND_SKIP_BBTSCAN.

Move NAND_SKIP_BBTSCAN flag check to nand_block_checkbad() so that
chip->scan_bbt() is never run if NAND_SKIP_BBTSCAN is set.

Also, unset NAND_BBT_SCANNED flag instead of running chip->scan_bbt()
right after scrub.  We can be lazier here because the BBT is scanned
at the next call of nand_block_checkbad().

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Scott Wood <scottwood@freescale.com>

Commit 35c204d8a9d0 (nand: reinstate lazy bad block scanning)
broke NAND_BBT_USE_FLASH feature.

Its git-log claimed that it reinstated the change as by commit
fb49454b1b6c ("nand: reinstate lazy bad block scanning"), but it moved
"chip->options |= NAND_BBT_SCANNED" below "chip->scan_bbt(mtd);".

It causes recursion if scan_bbt does not find a flash based BBT
and tries to write one, and the attempt to erase the BBT area
causes a bad block check.

Reinstate commit ff49ea8977b5 (NAND: Mark the BBT as scanned prior to
calling scan_bbt.).

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Rostislav Lisovy <lisovy@merica.cz>
Cc: Heiko Schocher <hs@denx.de>
Cc: Scott Wood <scottwood@freescale.com>

Since commit ff94bc40af34 (mtd, ubi, ubifs: resync with Linux-3.14),
the "nand scrub" command has not been working.

Signed-off-by: Masahiro Yamada <yamada.m@jp.panasonic.com>
Cc: Scott Wood <scottwood@freescale.com>
Cc: Heiko Schocher <hs@denx.de>

"err" was an unsigned variable, causing negative error codes to turn
into positive values, which are interpreted as an amount of succesfully
corrected bitflips (and thus not an error).

In particular, this resulted in that if the elm reports uncorrectable
errors (-EBADMSG), the MTD layer (and UBI) falsely succeeded.

Signed-off-by: Guido Martínez <guido@vanguardiasur.com.ar>
Reviewed-by: Stefan Roese <sr@denx.de>

Add the necessary flash entry for the Spansion S25FL164K
flash. Tested on Marvell 88F6218 based design.

Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>

Added S25FL116K flash and tested on Marvell 88F6281 based system.

Signed-off-by: Adnan Ali <adnan.ali@codethink.co.uk>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>

Add support for SST25WF040B-40I-SN flash.
Tested on T1024QDS board.

Signed-off-by: Shengzhou Liu <Shengzhou.Liu@freescale.com>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>

Removed ramtron driver since the EMK boards are
no longer been active, and these are the only boards
used this flash driver.

Commit details for EMK zap:
"ppc/arm: zap EMK boards"
(sha1: d58a9451e7339ed4cf2b2627e534611f427fb791)

Signed-off-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Cc: Reinhard Meyer <reinhard.meyer@emk-elektronik.de>

Enabled byte program support for sst flashes in sf.

Few controllers will only support BP, so this patch gives
a tx transfer flag to set the BP so-that sf will operate
on byte program transfer.

A new TX operation mode SPI_OPM_TX_BP is introduced for such SPI
controller to use byte program op for SST flash.

Signed-off-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>
Tested-by: Bin Meng <bmeng.cn@gmail.com>

Currently if SST flash advertises SST_WP flag in the params table
the word program command (ADh) with auto address increment will be
used for the flash write op. However some SPI controllers do not
support the word program command (like the Intel ICH 7), the byte
programm command (02h) has to be used.

Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Acked-by: Simon Glass <sjg@chromium.org>
Tested-by: Simon Glass <sjg@chromium.org>
Reviewed-by: Jagannadha Sutradharudu Teki <jagannadh.teki@gmail.com>