u-boot.git/drivers/mtd, branch v2017.11-rc1

Merge git://www.denx.de/git/u-boot-cfi-flash

2017-09-26T23:38:04Z

mtd: cfi: Add support for status register polling

2017-09-26T08:57:53Z

The status register is optional in the AMD command sets, but it's presence can be checked by reading out CFI table entry 0xc bit 0. If the register is present, prefer using it's bit 7 to determine if the flash is busy over reading the flash ; this is needed ie. on Hyperflash memories. Signed-off-by: Marek Vasut Signed-off-by: Stefan Roese

mtd: cfi: Zap cfi_flash_base in DM case

2017-09-26T08:57:53Z

Embed the flash base into struct flash_info instead of having ad-hoc static array in the code. This does not only remove static variable, but also allows CFI-like controllers, ie. HyperFlash ones, to use most of the CFI flash code by populating the flash_info with matching base address. Signed-off-by: Marek Vasut Signed-off-by: Stefan Roese

Fix s25fl256s position in spi_flash_ids list

2017-09-25T07:30:34Z

Spansion S25FS256S and S25FL256S flashes have equal JEDEC ID and ext ID. As far as S25FL256S occures in spi_flash_ids before S25FS256S, U-Boot incorrectly detects FS flash as FL. Thus its better to compare with S25FS256S first. Signed-off-by: Vsevolod Gribov [Added S-o-b] Signed-off-by: Jagan Teki Reviewed-by: Jagan Teki

sf: Fix S25FL116K entry

2017-09-25T07:24:10Z

The flash chip is 2 MiB , organized as 32 x 64 kiB sectors . Rectify the entry to match the datasheet, reality and Linux SNOR IDs. Signed-off-by: Marek Vasut Reviewed-by: Jagan Teki

mtd/spi: Add MT35XU512ABA1G12 NOR flash support

2017-09-25T07:21:20Z

Add MT35XU512ABA1G12 parameters to NOR flash parameters array. The MT35XU512ABA1G12 only supports 1 bit mode and 8 bits. It can't support dual and quad. Supports subsector erase with 4KB granularity, have support of FSR(flag status register) and flash size is 64MB. Signed-off-by: Yogesh Gaur Reviewed-by: Jagan Teki

nds32: mtd: add spi flash id MX25U16335E.

2017-09-21T02:30:22Z

To support MACRONIX MX25U1635E 16M-BIT flash. Signed-off-by: rick

mtd: nand: denali: allow to override corrupted revision register

2017-09-18T11:26:00Z

The Denali IP does not update the revision register properly. Allow to override it with SoC data associated with compatible. Linux had already finished big surgery of this driver, but I need to prepare the NAND core before the full sync of the driver. For now, I am fixing the most fatal problem on UniPhier platform. Signed-off-by: Masahiro Yamada

mtd: nand: denali_dt: add a DT driver

2017-08-30T00:03:11Z

A patch for NAND uclass support was proposed about half a year ago: https://patchwork.ozlabs.org/patch/722282/ It was not merged and I do not see on-going work for this. Without DM-based probing, we need to set up pinctrl etc. in an ad-hoc way and give lots of crappy CONFIG options for base addresses and properties, which are supposed to be specified by DT. This is painful. This commit just provides a probe hook to retrieve "reg" from DT and allocate private data in a DM manner. This DT driver is not essentially a NAND driver, in fact it is (ab)using UCLASS_MISC. Once UCLASS_NAND is supported, it would be possible to migrate to it. Signed-off-by: Masahiro Yamada

mtd: cfi: staticize functions

2017-08-22T07:56:09Z

Staticize a few functions and variables which are no longer exposed. Signed-off-by: Marek Vasut Cc: Stefan Roese Signed-off-by: Stefan Roese