<feed xmlns='http://www.w3.org/2005/Atom'>
<title>u-boot.git/drivers/mtd, branch v2018.09</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.
</subtitle>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/'/>
<entry>
<title>mtd: nand: denali: fix unaligned cache operations on ARMv7 SoCs</title>
<updated>2018-09-10T18:08:22+00:00</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2018-09-10T02:17:30+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=e8f65763ef07e0667f57dda7eece657f8fe136a7'/>
<id>e8f65763ef07e0667f57dda7eece657f8fe136a7</id>
<content type='text'>
If the OOB size is not multiple of the cache line size, the ARMv7
cache operation still prints "Misaligned operation at range".

=&gt; nand info

Device 0: nand0, sector size 256 KiB
  Page size       4096 b
  OOB size         224 b
  Erase size    262144 b
  subpagesize     4096 b
  options     0x00104200
  bbt options 0x00060000
=&gt; nand dump 0
CACHE: Misaligned operation at range [9fb15280, 9fb16360]
CACHE: Misaligned operation at range [9fb15280, 9fb16360]
CACHE: Misaligned operation at range [9fb15280, 9fb16360]
CACHE: Misaligned operation at range [9fb15280, 9fb16360]
  ...

The cache flushing operations won't happen in this case to cover all of
the range to fix this by making sure we have things aligned.

Reported-by: Marek Vasut &lt;marex@denx.de&gt;
Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
[trini: Reword the commit message to be clear this is a direct problem
rather than just a warning]
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
If the OOB size is not multiple of the cache line size, the ARMv7
cache operation still prints "Misaligned operation at range".

=&gt; nand info

Device 0: nand0, sector size 256 KiB
  Page size       4096 b
  OOB size         224 b
  Erase size    262144 b
  subpagesize     4096 b
  options     0x00104200
  bbt options 0x00060000
=&gt; nand dump 0
CACHE: Misaligned operation at range [9fb15280, 9fb16360]
CACHE: Misaligned operation at range [9fb15280, 9fb16360]
CACHE: Misaligned operation at range [9fb15280, 9fb16360]
CACHE: Misaligned operation at range [9fb15280, 9fb16360]
  ...

The cache flushing operations won't happen in this case to cover all of
the range to fix this by making sure we have things aligned.

Reported-by: Marek Vasut &lt;marex@denx.de&gt;
Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
[trini: Reword the commit message to be clear this is a direct problem
rather than just a warning]
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge git://git.denx.de/u-boot-fsl-qoriq</title>
<updated>2018-08-13T16:34:55+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2018-08-13T16:34:55+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b8a1f47be3ab050090cd8625e580cf3c63e3ff53'/>
<id>b8a1f47be3ab050090cd8625e580cf3c63e3ff53</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>mtd: nand: fsl_ifc: Fix handling of bitflips in erased pages</title>
<updated>2018-08-10T17:35:51+00:00</updated>
<author>
<name>Darwin Dingel</name>
<email>darwin.dingel@alliedtelesis.co.nz</email>
</author>
<published>2018-08-02T08:02:45+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=1711add3dca291376072ec0c66b01023a3462daf'/>
<id>1711add3dca291376072ec0c66b01023a3462daf</id>
<content type='text'>
This is a fix made for the fsl_ifc_nand driver on linux kernel by
Pavel Machek and is applied to uboot. It is currently on applied on
linux-mtd.

https://patchwork.kernel.org/patch/9758117/

IFC always raises ECC errors on erased pages. It is only ignored when
the buffer is checked for all 0xFF by is_blank(). The problem is a
single bitflip will cause is_blank() and then mtd_read to fail. The fix
makes use of nand_check_erased_ecc_chunk() to check for empty pages
instead of is_blank(). This also makes sure that reads are made at ECC
page size granularity to get a proper bitflip count. If the number of
bitflips does not exceed the ECC strength, the page is considered empty
and the bitflips will be corrected when data is sent to the higher
layers (e.g. ubi).

Signed-off-by: Darwin Dingel &lt;darwin.dingel@alliedtelesis.co.nz&gt;
Cc: Pavel Machek &lt;pavel@denx.de&gt;
Cc: Scott Wood &lt;oss@buserror.net&gt;
Acked-by: Pavel Machek &lt;pavel@denx.de&gt;
[Kurt: Replaced dev_err by printf due to compiler warnings]
Tested-by: Kurt Kanzenbach &lt;kurt@linutronix.de&gt;
Signed-off-by: Kurt Kanzenbach &lt;kurt@linutronix.de&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
This is a fix made for the fsl_ifc_nand driver on linux kernel by
Pavel Machek and is applied to uboot. It is currently on applied on
linux-mtd.

https://patchwork.kernel.org/patch/9758117/

IFC always raises ECC errors on erased pages. It is only ignored when
the buffer is checked for all 0xFF by is_blank(). The problem is a
single bitflip will cause is_blank() and then mtd_read to fail. The fix
makes use of nand_check_erased_ecc_chunk() to check for empty pages
instead of is_blank(). This also makes sure that reads are made at ECC
page size granularity to get a proper bitflip count. If the number of
bitflips does not exceed the ECC strength, the page is considered empty
and the bitflips will be corrected when data is sent to the higher
layers (e.g. ubi).

Signed-off-by: Darwin Dingel &lt;darwin.dingel@alliedtelesis.co.nz&gt;
Cc: Pavel Machek &lt;pavel@denx.de&gt;
Cc: Scott Wood &lt;oss@buserror.net&gt;
Acked-by: Pavel Machek &lt;pavel@denx.de&gt;
[Kurt: Replaced dev_err by printf due to compiler warnings]
Tested-by: Kurt Kanzenbach &lt;kurt@linutronix.de&gt;
Signed-off-by: Kurt Kanzenbach &lt;kurt@linutronix.de&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>spi: Kconfig: Create ISSI Kconfig entry</title>
<updated>2018-08-06T06:44:35+00:00</updated>
<author>
<name>Michal Simek</name>
<email>michal.simek@xilinx.com</email>
</author>
<published>2016-01-25T14:39:26+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=13f451bf5625e222e881779e69d92a2002e41dfc'/>
<id>13f451bf5625e222e881779e69d92a2002e41dfc</id>
<content type='text'>
Add ISSI to Kconfig to make it selectable via menuconfig.
Also convert all current platforms.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add ISSI to Kconfig to make it selectable via menuconfig.
Also convert all current platforms.

Signed-off-by: Michal Simek &lt;michal.simek@xilinx.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-spi</title>
<updated>2018-08-04T23:41:43+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2018-08-04T23:41:43+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=bb694d4e898b1368ba96e01481dc0a79c491e77c'/>
<id>bb694d4e898b1368ba96e01481dc0a79c491e77c</id>
<content type='text'>
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
</pre>
</div>
</content>
</entry>
<entry>
<title>mtd: add spi flash id s25fl128l</title>
<updated>2018-08-03T05:39:53+00:00</updated>
<author>
<name>Clément Laigle</name>
<email>c.laigle@catie.fr</email>
</author>
<published>2018-07-26T07:31:41+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=04d57b1d588aeda00f308028aad6239467f24923'/>
<id>04d57b1d588aeda00f308028aad6239467f24923</id>
<content type='text'>
Add support for SPANSION s25fl128l

Signed-off-by: Clément Laigle &lt;c.laigle@catie.fr&gt;
Reviewed-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
[jagan: fixed , at the end of } ]
Signed-off-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Add support for SPANSION s25fl128l

Signed-off-by: Clément Laigle &lt;c.laigle@catie.fr&gt;
Reviewed-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
[jagan: fixed , at the end of } ]
Signed-off-by: Jagan Teki &lt;jagan@amarulasolutions.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mtd: nand: sunxi: Return on set_feature only when not ENOTSUPP</title>
<updated>2018-07-31T15:15:50+00:00</updated>
<author>
<name>Mylène Josserand</name>
<email>mylene.josserand@bootlin.com</email>
</author>
<published>2018-07-13T16:10:24+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=850bdafa503e2045a8e931ce601fd71dc33157cf'/>
<id>850bdafa503e2045a8e931ce601fd71dc33157cf</id>
<content type='text'>
Return the error code of the set_features function only if
the error code is not ENOTSUPP. Otherwise, if this function
is not supported, it will return and fail to initialize the
NAND.

Signed-off-by: Mylène Josserand &lt;mylene.josserand@bootlin.com&gt;
Acked-by: Jagan Teki &lt;jagan@openedev.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Return the error code of the set_features function only if
the error code is not ENOTSUPP. Otherwise, if this function
is not supported, it will return and fail to initialize the
NAND.

Signed-off-by: Mylène Josserand &lt;mylene.josserand@bootlin.com&gt;
Acked-by: Jagan Teki &lt;jagan@openedev.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mtd: nand: nand_base: Convert EINVAL into ENOTSUPP</title>
<updated>2018-07-31T15:15:42+00:00</updated>
<author>
<name>Mylène Josserand</name>
<email>mylene.josserand@bootlin.com</email>
</author>
<published>2018-07-13T16:10:23+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=cbe9ea26e3a275bc3e47414797406a234c0baa55'/>
<id>cbe9ea26e3a275bc3e47414797406a234c0baa55</id>
<content type='text'>
Convert the EINVAL error into ENOTSUPP when the GET/SET_FEATURES
is not supported.

Signed-off-by: Mylène Josserand &lt;mylene.josserand@bootlin.com&gt;
Acked-by: Jagan Teki &lt;jagan@openedev.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
Convert the EINVAL error into ENOTSUPP when the GET/SET_FEATURES
is not supported.

Signed-off-by: Mylène Josserand &lt;mylene.josserand@bootlin.com&gt;
Acked-by: Jagan Teki &lt;jagan@openedev.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>mtd: nand: denali: correct buffer alignment for DMA transfer</title>
<updated>2018-07-24T23:47:52+00:00</updated>
<author>
<name>Masahiro Yamada</name>
<email>yamada.masahiro@socionext.com</email>
</author>
<published>2018-07-19T01:13:23+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4a610fada193057c97c1b23016ef119f98459b22'/>
<id>4a610fada193057c97c1b23016ef119f98459b22</id>
<content type='text'>
The NAND framework makes sure to pass in the buffer with at least
chip-&gt;buf_align alignment.  Currently, the Denali NAND driver only
requests 16 byte alignment.  This causes unaligned cache operations
for the DMA transfer.

[Error Example]

=&gt; nand read 81000010 0 1000

NAND read: device 0 offset 0x0, size 0x1000
CACHE: Misaligned operation at range [81000010, 81001010]
CACHE: Misaligned operation at range [81000010, 81001010]
CACHE: Misaligned operation at range [81000010, 81001010]
CACHE: Misaligned operation at range [81000010, 81001010]
 4096 bytes read: OK

Reported-by: Marek Vasut &lt;marex@denx.de&gt;
Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
The NAND framework makes sure to pass in the buffer with at least
chip-&gt;buf_align alignment.  Currently, the Denali NAND driver only
requests 16 byte alignment.  This causes unaligned cache operations
for the DMA transfer.

[Error Example]

=&gt; nand read 81000010 0 1000

NAND read: device 0 offset 0x0, size 0x1000
CACHE: Misaligned operation at range [81000010, 81001010]
CACHE: Misaligned operation at range [81000010, 81001010]
CACHE: Misaligned operation at range [81000010, 81001010]
CACHE: Misaligned operation at range [81000010, 81001010]
 4096 bytes read: OK

Reported-by: Marek Vasut &lt;marex@denx.de&gt;
Signed-off-by: Masahiro Yamada &lt;yamada.masahiro@socionext.com&gt;
</pre>
</div>
</content>
</entry>
<entry>
<title>Merge branch 'master' of git://git.denx.de/u-boot-imx</title>
<updated>2018-07-23T17:37:42+00:00</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2018-07-23T14:51:13+00:00</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=f0306a145b3234ae4bd3b46f2567b6f1ad7b8f4f'/>
<id>f0306a145b3234ae4bd3b46f2567b6f1ad7b8f4f</id>
<content type='text'>
trini: Update colibri-imx6ull to use Kconfig for mtdparts related
options.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
<content type='xhtml'>
<div xmlns='http://www.w3.org/1999/xhtml'>
<pre>
trini: Update colibri-imx6ull to use Kconfig for mtdparts related
options.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</pre>
</div>
</content>
</entry>
</feed>
