u-boot.git/drivers/mtd, branch v2025.01-rc1

mtd: spi-nor: Add mt35xu01gbba octal mode SPI NOR flash

2024-10-24T12:40:50Z

Add SPI NOR flash id for mt35xu01gbba which supports 4 bytes address with octal mode read. Signed-off-by: Han Xu Signed-off-by: Alice Guo Reviewed-by: Peng Fan Reviewed-by: Jagan Teki

mtd: spi-nor-ids: Add Puya Semiconductor chips description

2024-10-24T12:38:51Z

Added support for the Puya Semiconductor chips. The datasheet can be found here: https://www.puyasemi.com/h_xilie715.html Signed-off-by: Dmitry Dunaev Reviewed-by: Jagan Teki

mtd: spi-nor: Set ECC unit size to MTD writesize in Infineon SEMPER flashes

2024-10-15T14:57:49Z

The Infineon SEMPER NOR flash family uses 2-bit ECC by default with each ECC block being 16 bytes. Under this scheme multi-pass programming to an ECC block is not allowed. Set the writesize to make sure multi-pass programming is not attempted on the flash. Acked-by: Tudor Ambarus Signed-off-by: Takahiro Kuwano

mtd: spi-nor: Call spi_nor_post_sfdp_fixups() only after spi_nor_parse_sfdp()

2024-10-15T14:57:49Z

This patch follows the upstream linux commit: 5273cc6df984("mtd: spi-nor: core: Call spi_nor_post_sfdp_fixups() only when SFDP is defined") spi_nor_post_sfdp_fixups() was called regardless of if spi_nor_parse_sfdp() had been called or not. late_init() should be instead used to initialize the parameters that are not defined in SFDP. Ideally spi_nor_post_sfdp_fixups() is called only after successful parse of SFDP. However, in case SFDP support is disabled by .config, that can break current functionality. Therefore, we would call it after spi_nor_parse_sfdp() regardless of its return value. Acked-by: Tudor Ambarus Signed-off-by: Takahiro Kuwano

mtd: spi-nor: Replace default_init() hook with late_init()

2024-10-15T14:57:49Z

default_init() is wrong, it contributes to the maze of initializing flash parameters. We'd like to get rid of it because the flash parameters that it initializes are not really used at SFDP parsing time, thus they can be initialized later. Ideally we want SFDP to initialize all the flash parameters. If (when) SFDP tables are wrong, we fix them with the post_sfdp/bfpt hooks, to emphasize that SFDP is indeed wrong. When there are parameters that are not covered by SFDP, we initialize them in late_init() - these parameters have nothing to do with SFDP and they are not needed earlier. With this we'll have a clearer view of who initializes what. There are six default_init() hooks implemented just for initializing octal_dtr_enable() and/or setup() hooks that called later on. Just moving those to late_init() does not change functionality. Suggested-by: Tudor Ambarus Acked-by: Tudor Ambarus Signed-off-by: Takahiro Kuwano

mtd: spi-nor: Check nor->info before setting macronix_octal_fixups

2024-10-15T14:57:49Z

The macronix_octal_fixups should be set only when mfr and flags match. Fixes: df3d5f9e41 ("mtd: spi-nor: add support for Macronix Octal flash") Acked-by: Tudor Ambarus Signed-off-by: Takahiro Kuwano Cc: JaimeLiao

mtd: spi-nor: Allow flashes to specify MTD writesize

2024-10-15T14:57:49Z

Some flashes like the Infineon SEMPER NOR flash family use ECC. Under this ECC scheme, multi-pass writes to an ECC block is not allowed. In other words, once data is programmed to an ECC block, it can't be programmed again without erasing it first. Upper layers like file systems need to be given this information so they do not cause error conditions on the flash by attempting multi-pass programming. This can be done by setting 'writesize' in 'struct mtd_info'. Set the default to 1 but allow flashes to modify it in fixup hooks. If more flashes show up with this constraint in the future it might be worth it to add it to 'struct flash_info', but for now increasing its size is not worth it. This patch replicates the following upstream linux commit: afd473e85827 ("mtd: spi-nor: core: Allow flashes to specify MTD writesize") Acked-by: Tudor Ambarus Signed-off-by: Takahiro Kuwano

mtd: ubi: Do not zero out EC and VID on ECC-ed NOR flashes

2024-10-15T14:57:49Z

For NOR flashes EC and VID are zeroed out before an erase is issued to make sure UBI does not mistakenly treat the PEB as used and associate it with an LEB. But on some flashes, like the Infineon Semper NOR flash family, multi-pass page programming is not allowed on the default ECC scheme. This means zeroing out these magic numbers will result in the flash throwing a page programming error. Do not zero out EC and VID for such flashes. A writesize > 1 is an indication of an ECC-ed flash. This patch replicates the following upstream linux commit: f669e74be820 ("ubi: Do not zero out EC and VID on ECC-ed NOR flashes") Acked-by: Tudor Ambarus Acked-by: Pratyush Yadav Signed-off-by: Takahiro Kuwano Reviewed-by: Tudor Ambarus

mtd: rawnand: brcmnand: Add BCMBCA RAW NAND driver

2024-10-12T16:10:44Z

The Broadcom BCA platforms are broadband access SoCs. This is a port of the upstream Linux driver to U-Boot. It was based on drivers/mtd/nand/raw/brcmnand/bcmbca_nand.c from Linux v6.11. Reviewed-by: Michael Trimarchi Signed-off-by: Linus Walleij

mtd: nand: raw: atmel: Use ONFI ECC params if available

2024-10-12T16:10:21Z

When ECC parameters are not specified in DT, first try ONFI ECC parameters before fallback to maximum strength. It's the Linux driver behavior since the driver rewriting in f88fc12. From then 2 nand system refactors have been done in 6a1b66d6 and 53576c7b, chip->ecc_strength_ds and chip->ecc_step_ds became nanddev_get_ecc_requirements(). U-Boot didn't follow the refactor and always use these 2 fields. v2: Fix formatting, add upstream commit hash. Signed-off-by: Zixun LI Reviewed-by: Michael Trimarchi Acked-by: Balamanikandan Gunasundar