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<title>u-boot.git/drivers/net/Kconfig, branch v2019.04</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/net/Kconfig?h=v2019.04</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/drivers/net/Kconfig?h=v2019.04'/>
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<updated>2019-02-18T12:00:53Z</updated>
<entry>
<title>arm: socfpga: gen5 enable designware_socfpga</title>
<updated>2019-02-18T12:00:53Z</updated>
<author>
<name>Simon Goldschmidt</name>
<email>simon.k.r.goldschmidt@gmail.com</email>
</author>
<published>2019-01-13T18:58:41Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6fb1eb1b7642d0d4dc984bc087939fb40142754c'/>
<id>urn:sha1:6fb1eb1b7642d0d4dc984bc087939fb40142754c</id>
<content type='text'>
Enable the socfpga specific designware ethernet driver by default for
socfpga by implying it when enabling CONFIG_ETH_DESIGNWARE for a
MACH_SOCFPGA config.

This is required to remove the hacky reset and phy mode handling in
arch/arm/mach-socfpga.

Signed-off-by: Simon Goldschmidt &lt;simon.k.r.goldschmidt@gmail.com&gt;
</content>
</entry>
<entry>
<title>net: designware: socfpga: adapt to Gen5</title>
<updated>2019-02-18T12:00:53Z</updated>
<author>
<name>Simon Goldschmidt</name>
<email>simon.k.r.goldschmidt@gmail.com</email>
</author>
<published>2019-01-13T18:58:40Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=4f1267cea1e68395f5c6fd15624e88dfdc1c1540'/>
<id>urn:sha1:4f1267cea1e68395f5c6fd15624e88dfdc1c1540</id>
<content type='text'>
This driver was written for Arria10, but it applies to Gen5, too.

The main difference is that Gen5 has 2 MACs (Arria10 has 3) and the
syscon bits are encoded in the same register, thus an offset is needed.

This offset is already read from the devicetree, but for Arria10 it is
always 0, which is probably why it has been ignored. By using this
offset when writing the phy mode into the syscon regiter, we can use
this driver to set the phy mode for both of the MACs on Gen5.

Since the PHY mode bits in sysmgr are the same even for Stratix10,
let's drop the detection of the sub-mach by checking compatible
version and just use the same code for all FPGAs.

To work correctly, this driver depends on SYSCON and REGMAP, so select
those via Kconfig when it is enabeld.

Tested on socfpga_socrates (where the 2nd MAC is connected, so a shift
offset is required).

Signed-off-by: Simon Goldschmidt &lt;simon.k.r.goldschmidt@gmail.com&gt;
</content>
</entry>
<entry>
<title>net: mscc: Move ocelot_switch to mscc_eswitch folder</title>
<updated>2019-02-01T13:13:36Z</updated>
<author>
<name>Horatiu Vultur</name>
<email>horatiu.vultur@microchip.com</email>
</author>
<published>2019-01-31T14:30:33Z</published>
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<id>urn:sha1:4c66157f427ad87d683b76d6819a00138e9f71dd</id>
<content type='text'>
Move file ocelot_switch to mscc_eswitch to prepare to add
new net drivers for other MSCC SoCs.

Signed-off-by: Horatiu Vultur &lt;horatiu.vultur@microchip.com&gt;
</content>
</entry>
<entry>
<title>net: add MSCC Ocelot switch support</title>
<updated>2019-01-23T17:26:44Z</updated>
<author>
<name>Gregory CLEMENT</name>
<email>gregory.clement@bootlin.com</email>
</author>
<published>2019-01-17T16:07:13Z</published>
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<id>urn:sha1:c8546163fa92bb46c09017db18dadbb26e639895</id>
<content type='text'>
This patch adds support for the Microsemi Ethernet switch present on
Ocelot SoCs.

Signed-off-by: Gregory CLEMENT &lt;gregory.clement@bootlin.com&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</content>
</entry>
<entry>
<title>ethernet: MediaTek: add ethernet driver for MediaTek ARM-based SoCs</title>
<updated>2019-01-14T22:43:18Z</updated>
<author>
<name>Weijie Gao</name>
<email>weijie.gao@mediatek.com</email>
</author>
<published>2018-12-20T08:12:53Z</published>
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<id>urn:sha1:23f17164d9ed6b92f7cd2064aa80f15da5489056</id>
<content type='text'>
This patch adds ethernet support for Mediatek ARM-based SoCs, including
a minimum setup of the integrated switch.

Cc: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Signed-off-by: Mark Lee &lt;Mark-MC.Lee@mediatek.com&gt;
Signed-off-by: Weijie Gao &lt;weijie.gao@mediatek.com&gt;
Tested-By: "Frank Wunderlich" &lt;frank-w@public-files.de&gt;
</content>
</entry>
<entry>
<title>net: add support for bcm6368-enet</title>
<updated>2018-12-19T14:23:01Z</updated>
<author>
<name>Álvaro Fernández Rojas</name>
<email>noltari@gmail.com</email>
</author>
<published>2018-12-01T18:00:32Z</published>
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<id>urn:sha1:9622972af47a05bc8d801625ee2ae3aaff416dbf</id>
<content type='text'>
Signed-off-by: Álvaro Fernández Rojas &lt;noltari@gmail.com&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</content>
</entry>
<entry>
<title>net: add support for bcm6348-enet</title>
<updated>2018-12-19T14:23:00Z</updated>
<author>
<name>Álvaro Fernández Rojas</name>
<email>noltari@gmail.com</email>
</author>
<published>2018-12-01T18:00:24Z</published>
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<id>urn:sha1:55e55fe4a6e4e8b7cef6f92c1a84d863a637b30f</id>
<content type='text'>
Signed-off-by: Álvaro Fernández Rojas &lt;noltari@gmail.com&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
</content>
</entry>
<entry>
<title>driver: net: consolidate ti's code in separate folder</title>
<updated>2018-11-05T16:41:59Z</updated>
<author>
<name>Grygorii Strashko</name>
<email>grygorii.strashko@ti.com</email>
</author>
<published>2018-10-31T21:21:39Z</published>
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<id>urn:sha1:ffad5fa0cdc55c47bc023e9e0fe55e27b7317ea4</id>
<content type='text'>
Add drivers/net/ti/ folder and move all TI's code in this folder for better
maintenance.

Reviewed-by: Tom Rini &lt;trini@konsulko.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Signed-off-by: Grygorii Strashko &lt;grygorii.strashko@ti.com&gt;
</content>
</entry>
<entry>
<title>net: ftgmac100: convert to driver model</title>
<updated>2018-11-05T16:41:56Z</updated>
<author>
<name>Cédric Le Goater</name>
<email>clg@kaod.org</email>
</author>
<published>2018-10-29T06:06:31Z</published>
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<id>urn:sha1:f95de0bd104a88006c09cb74abf4db1b0f2188ca</id>
<content type='text'>
The driver is based on the previous one and the code is only adapted
to fit the driver model. The support for the Faraday ftgmac100
controller is the same with MAC and MDIO bus support for RGMII/RMII
modes.

Configuration is updated to enable compile again. At this stage, the
driver compiles but is not yet functional.

Signed-off-by: Cédric Le Goater &lt;clg@kaod.org&gt;
Reviewed-by: Joel Stanley &lt;joel@jms.id.au&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
</entry>
<entry>
<title>net: Add MT7628 ethernet driver</title>
<updated>2018-11-05T16:41:56Z</updated>
<author>
<name>Stefan Roese</name>
<email>sr@denx.de</email>
</author>
<published>2018-10-26T12:53:27Z</published>
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<id>urn:sha1:c895ef465059c399fdfd3f581848c67017226741</id>
<content type='text'>
This patch adds ethernet support for the MIPS based Mediatek MT76xx SoCs
(e.g. MT7628 and MT7688), including a minimum setup of the integrated
switch. This driver is loosly based on the driver version included in
this MediaTek github repository:

https://github.com/MediaTek-Labs/linkit-smart-uboot.git

Tested on the MT7688 LinkIt smart-gateway and on the
Gardena-smart-gateway.

Signed-off-by: Stefan Roese &lt;sr@denx.de&gt;
Reviewed-by: Daniel Schwierzeck &lt;daniel.schwierzeck@gmail.com&gt;
Cc: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
Cc: Frank Wunderlich &lt;frankwu@gmx.de&gt;
Cc: Weijie Gao &lt;hackpascal@gmail.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
</entry>
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