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<title>u-boot.git/drivers/net/Kconfig, branch v2026.01</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/net/Kconfig?h=v2026.01</id>
<link rel='self' href='http://cgit.235523.xyz/u-boot.git/atom/drivers/net/Kconfig?h=v2026.01'/>
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<updated>2025-11-06T19:08:37Z</updated>
<entry>
<title>net: rswitch: Add Renesas R-Car X5H Ethernet Switch3 support</title>
<updated>2025-11-06T19:08:37Z</updated>
<author>
<name>Marek Vasut</name>
<email>marek.vasut+renesas@mailbox.org</email>
</author>
<published>2025-10-27T16:45:42Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=eaef9548445b52d28055c3c2157158cd7d5f5f67'/>
<id>urn:sha1:eaef9548445b52d28055c3c2157158cd7d5f5f67</id>
<content type='text'>
Add support for the Renesas Ethernet Switch3 (RSW3) controller,
present in R-Car Gen5 SoCs such as R-Car X5H (R8A78000). The
hardware offset differences are handled via driver match data.

The driver newly detects whether the switch prot is connected
to xPCS or not, and if so, turns on MIOC bit 3. This is new on
R-Car X5H. GWCKSC register is also programmed only on X5H. The
rest of the operation is identical to RSwitch2.

Signed-off-by: Marek Vasut &lt;marek.vasut+renesas@mailbox.org&gt;
Signed-off-by: Tam Nguyen &lt;tam.nguyen.xa@renesas.com&gt;
Signed-off-by: Phong Hoang &lt;phong.hoang.wz@renesas.com&gt;
Signed-off-by: Thanh Quan &lt;thanh.quan.xn@renesas.com&gt;
Signed-off-by: Hai Pham &lt;hai.pham.ud@renesas.com&gt;
</content>
</entry>
<entry>
<title>net: fsl_enetc: Add i.MX94 support to NETC block control driver</title>
<updated>2025-11-04T15:39:46Z</updated>
<author>
<name>Ye Li</name>
<email>ye.li@nxp.com</email>
</author>
<published>2025-10-28T02:46:29Z</published>
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<id>urn:sha1:f4e9645108701c1f8e2d2b66d75af95db5387f89</id>
<content type='text'>
Extend the NETC block control driver to support the i.MX94 SoC.

Acked-by: Peng Fan &lt;peng.fan@nxp.com&gt;
Reviewed-by: Jacky Bai &lt;ping.bai@nxp.com&gt;
Signed-off-by: Ye Li &lt;ye.li@nxp.com&gt;
Signed-off-by: Alice Guo &lt;alice.guo@nxp.com&gt;
</content>
</entry>
<entry>
<title>net: mediatek: move MT7531 MMIO MDIO to dedicated driver</title>
<updated>2025-10-22T09:16:10Z</updated>
<author>
<name>Christian Marangi</name>
<email>ansuelsmth@gmail.com</email>
</author>
<published>2025-09-20T16:09:44Z</published>
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<id>urn:sha1:b24268d151a0c28772785e14703491364becda5b</id>
<content type='text'>
In preparation for support of MDIO on AN7581, move the MT7531 MMIO logic
to a dedicated driver and permit usage of the mdio read/write function
to the mtk_eth driver.

This only affect MT7988 that can use MMIO operation to access the Switch
register. The MT7988 code is updated to make use of the external driver.

This permits Airoha driver to make use of DM_MDIO to bind for the MT7531
driver that have the same exact register.

Signed-off-by: Christian Marangi &lt;ansuelsmth@gmail.com&gt;
</content>
</entry>
<entry>
<title>net: Tighten more driver dependencies</title>
<updated>2025-10-22T09:16:09Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-09-25T20:44:14Z</published>
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<id>urn:sha1:772703b77e51f8c1685e7daaa9935dc46b21a30e</id>
<content type='text'>
In this case, the mediatek network drivers cannot build outside of
ARCH_MEDIATEK or ARCH_MTMIPS, and so express this requirement in Kconfig
as well. In the case of DWC_ETH_XGMAC / DWC_ETH_XGMAC_SOCFPGA, the file
controlled by the DWC_ETH_XGMAC option references a socfpga-specific
array defined in the file controlled by DWC_ETH_XGMAC_SOCFPGA. Rework
these options in Kconfig to handle this dependency.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>arm: socfpga: Tighten a few more driver dependencies</title>
<updated>2025-10-22T09:09:24Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-09-25T20:44:11Z</published>
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<id>urn:sha1:4cc1fe3f5617133e1d5a180f1d62cc987dc4e81d</id>
<content type='text'>
Some drivers which depend on SoCFPGA specific headers had not had
appropriate dependencies list in Kconfig. Add ARCH_SOCFPGA or
TARGET_SOCFPGA_SOC64 where appropriate.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>net: fix RMII help text</title>
<updated>2025-09-30T10:01:36Z</updated>
<author>
<name>Yegor Yefremov</name>
<email>yegorslists@googlemail.com</email>
</author>
<published>2025-09-22T13:32:29Z</published>
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<id>urn:sha1:adc6d192e9cab74a4f31accb43914fc1928ea79d</id>
<content type='text'>
Replace MII with RMII as it is a Reduced Media-Independent Interface.

Signed-off-by: Yegor Yefremov &lt;yegorslists@googlemail.com&gt;
Reviewed-by: Quentin Schulz &lt;quentin.schulz@cherry.de&gt;
</content>
</entry>
<entry>
<title>arm: bcm281xx: Remove ethernet driver</title>
<updated>2025-08-01T07:30:47Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-07-18T01:15:44Z</published>
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<id>urn:sha1:3c1ac44caaa243acb7c3fe0aca412778b8cc28e6</id>
<content type='text'>
As no platforms enable the ethernet driver, remove it.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>net: Tighten some network driver dependencies</title>
<updated>2025-08-01T07:30:47Z</updated>
<author>
<name>Tom Rini</name>
<email>trini@konsulko.com</email>
</author>
<published>2025-07-18T01:15:40Z</published>
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<id>urn:sha1:982aac5754548bb95c4637359354823143896c4a</id>
<content type='text'>
A large number of network drivers cannot build without access to some
platform specific header files. Express those requirements in Kconfig as
well. This covers the QUICC engine drivers as that is networking
driver infrastructure.

Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>drivers: net: Add T-Head DWMAC glue layer</title>
<updated>2025-07-17T06:37:40Z</updated>
<author>
<name>Yao Zi</name>
<email>ziyao@disroot.org</email>
</author>
<published>2025-07-10T03:41:59Z</published>
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<id>urn:sha1:8a3c3a8a116b3cc6def5ed09dd32e6135683b2bd</id>
<content type='text'>
The Designware IP integrated in TH1520 SoC requires extra clock
configuration to operate correctly. The Linux kernel's T-Head DWMAC glue
driver is ported and adapted to U-Boot's API.

Signed-off-by: Yao Zi &lt;ziyao@disroot.org&gt;
Acked-by: Leo Yu-Chi Liang &lt;ycliang@andestech.com&gt;
</content>
</entry>
<entry>
<title>net: ravb: Add RZ/G2L Support</title>
<updated>2025-05-04T18:25:03Z</updated>
<author>
<name>Paul Barker</name>
<email>paul.barker.ct@bp.renesas.com</email>
</author>
<published>2025-03-19T12:03:59Z</published>
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<id>urn:sha1:2fc48febcd052a10d7a645f0c0d1f923bbc0f7bd</id>
<content type='text'>
The Renesas R9A07G044L (RZ/G2L) SoC includes two Gigabit Ethernet
interfaces which can be supported using the ravb driver. Some RZ/G2L
specific steps need to be taken during initialization due to differences
between this SoC and previously supported SoCs. We also need to ensure
that the module reset is de-asserted after the module clock is enabled
but before any Ethernet register reads/writes take place.

Signed-off-by: Paul Barker &lt;paul.barker.ct@bp.renesas.com&gt;
</content>
</entry>
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