This patch adds the following changes to designware ethernet driver
found on the ST SPEAr SoC:

- Don't init MAC & PHY upon startup. This causes a delay, waiting for
  the auto negotiation to complete. And we don't want this delay to
  always happen. Especially not on platforms where ethernet is not
  used at all (e.g. booting via flash).
  Instead postpone the MAC / PHY configuration to the stage, where
  ethernet is first used.
- Add possibility for board specific PHY init code. This is needed
  for example on the X600 board, where the Vitesse PHY needs to be
  configured for GMII mode.
  This board specific PHY init is done via the function
  designware_board_phy_init(). And this driver now adds a weak default
  which can be overridden by board code.
- Use common functions miiphy_speed() & miiphy_duplex() to read
  link status from PHY.
- Print status and progress of auto negotiation.
- Print link status (speed, dupex) upon first usage.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Amit Virdi <amit.virdi@st.com>
Cc: Vipin Kumar <vipin.kumar@st.com>
Cc: Joe Hershberger <joe.hershberger@gmail.com>
Acked-by: Joe Hershberger <joe.hershberger@gmail.com>

Few Designware peripheral registers need to be modified based on the
ethernet interface selected by the board. This patch supports interface
information in ethernet driver

Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>
Signed-off-by: Stefan Roese <sr@denx.de>

These are all the files which use the API incorrectly but did not get
built using MAKEALL -a powerpc|arm.  I have no compiler for them, but
the remaining issues should be far less than without this patch.

Any outstanding issues are left to the maintainers of boards that use
these drivers.

Signed-off-by: Joe Hershberger <joe.hershberger@ni.com>

The new implementation changes the timeout loop implementation to avoid 1 ms
delay in each failing test. It also configures the delay to 10usec.

Signed-off-by: Amit Virdi <amit.virdi@st.com>

This patch forces the advertised capabilities during auto
negotiation to always be 10/100 Mbps and half/full as duplexing.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>

If AN(auto-negotiation) is ON, speed bit of control register are not
applicable.  Also phy registers were not getting programmed as per the
result of AN. This patch sets only AN bit & restart AN bit for AN ON
selection & programs PHY registers as per AN result.

Signed-off-by: Vikas Manocha <vikas.manocha@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>

Phy autonegotiation works only when the ethernet cable is plugged in.
Since the phy was configured only at the init time, a plugged in cable
was necessary to initialize the phy properly.

This patch keeps a flag to check if the phy initialization has
succeeded, and calls configure_phy routine at every init if this flag
reports otherwise.

Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>

This patch solves a TX/RX problem which happens at 10Mbps, due to the
fact that we are not respecting 4 cyles of the phy_clk (2.5MHz) between
two consecutive writes on the same register.

Signed-off-by: Armando Visconti <armando.visconti@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>

The code assumes the phy address to be > 0, which is not true, the phy address
can be in the range 0-31.

Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>

The network controller mac resets hardware address stored in MAC_HI and MAC_LO
registers if mac is resetted. So, hw mac address needs to be restored in case
mac is explicitly resetted from driver.

Signed-off-by: Vipin Kumar <vipin.kumar@st.com>
Signed-off-by: Amit Virdi <amit.virdi@st.com>