u-boot.git/drivers/net/designware.c, branch v2013.10-rc2

Add GPL-2.0+ SPDX-License-Identifier to source files

2013-07-24T13:44:38Z

Signed-off-by: Wolfgang Denk [trini: Fixup common/cmd_io.c] Signed-off-by: Tom Rini

net/designware: Do not select MIIPORT for RGMII interface

2013-06-25T00:10:16Z

Do not select MIIPORT for RGMII interface Signed-off-by: Vipin Kumar Acked-by: Stefan Roese

net/designware: Consecutive writes to the same register to be avoided

2012-07-11T18:15:31Z

This commit is an add-on to f6c4191f. There are a few registers where consecutive writes to the same location should be avoided or have a delay. According to Synopsys, here is a list of the registers and bit(s) where consecutive writes should be avoided or a delay is required: DMA Registers: Register 0 Bit 7 Register 6 All bits except for 24, 16-13, 2-1. GMAC Registers: Registers 0-3 All bits Registers 6-7 All bits Register 10 All bits Register 11 All bits except for 5-6. Registers 16-47 All bits Register 48 All bits except for 18-16, 14. Register 448 Bit 4. Register 459 Bits 0-3. Signed-off-by: Dinh Nguyen Reviewed-by: Matthew Gerlach Acked-by: Amit Virdi

net: Multiple updates/enhancements to designware.c

2012-07-07T12:07:42Z

This patch adds the following changes to designware ethernet driver found on the ST SPEAr SoC: - Don't init MAC & PHY upon startup. This causes a delay, waiting for the auto negotiation to complete. And we don't want this delay to always happen. Especially not on platforms where ethernet is not used at all (e.g. booting via flash). Instead postpone the MAC / PHY configuration to the stage, where ethernet is first used. - Add possibility for board specific PHY init code. This is needed for example on the X600 board, where the Vitesse PHY needs to be configured for GMII mode. This board specific PHY init is done via the function designware_board_phy_init(). And this driver now adds a weak default which can be overridden by board code. - Use common functions miiphy_speed() & miiphy_duplex() to read link status from PHY. - Print status and progress of auto negotiation. - Print link status (speed, dupex) upon first usage. Signed-off-by: Stefan Roese Cc: Amit Virdi Cc: Vipin Kumar Cc: Joe Hershberger Acked-by: Joe Hershberger

SPEAr: Add interface information in initialization

2012-07-07T12:07:40Z

Few Designware peripheral registers need to be modified based on the ethernet interface selected by the board. This patch supports interface information in ethernet driver Signed-off-by: Vipin Kumar Signed-off-by: Amit Virdi Signed-off-by: Stefan Roese

net: Fix remaining API interface breakage

2012-05-23T19:19:21Z

These are all the files which use the API incorrectly but did not get built using MAKEALL -a powerpc|arm. I have no compiler for them, but the remaining issues should be far less than without this patch. Any outstanding issues are left to the maintainers of boards that use these drivers. Signed-off-by: Joe Hershberger

net/designware: Change timeout loop implementation

2012-04-04T15:47:53Z

The new implementation changes the timeout loop implementation to avoid 1 ms delay in each failing test. It also configures the delay to 10usec. Signed-off-by: Amit Virdi

net/designware: Set ANAR to 0x1e1

2012-04-04T15:47:40Z

This patch forces the advertised capabilities during auto negotiation to always be 10/100 Mbps and half/full as duplexing. Signed-off-by: Armando Visconti Signed-off-by: Amit Virdi

net/designware: Program phy registers when auto-negotiation is ON

2012-04-04T15:47:34Z

If AN(auto-negotiation) is ON, speed bit of control register are not applicable. Also phy registers were not getting programmed as per the result of AN. This patch sets only AN bit & restart AN bit for AN ON selection & programs PHY registers as per AN result. Signed-off-by: Vikas Manocha Signed-off-by: Amit Virdi

net/designware: Try configuring phy on each dw_eth_init

2012-04-04T15:47:21Z

Phy autonegotiation works only when the ethernet cable is plugged in. Since the phy was configured only at the init time, a plugged in cable was necessary to initialize the phy properly. This patch keeps a flag to check if the phy initialization has succeeded, and calls configure_phy routine at every init if this flag reports otherwise. Signed-off-by: Vipin Kumar Signed-off-by: Amit Virdi