u-boot.git/drivers/net/designware.c, branch v2018.09

net: designware: Add reset ctrl to driver

2018-07-09T19:28:28+00:00

Add code to reset all reset signals as in Ethernet DT node. A reset
property is an optional feature, so only print out a warning and do not
fail if a reset property is not present.

If a reset property is discovered, then use it to deassert, thus
bringing the IP out of reset.

Signed-off-by: Ley Foon Tan 
Reviewed-by: Simon Glass 
Acked-by: Joe Hershberger

net: designware: set the PS bit when resetting DMA bus in MII configuration

2018-06-13T18:54:17+00:00

On the SPEAr600 SoC, which has the dwmac1000 variant of the IP block,
the DMA reset never succeeds when a MII PHY is used (no problem with a
GMII PHY). The designware_eth_init() function sets the
DMAMAC_SRST bit in the DMA_BUS_MODE register, and then
polls until this bit clears. When a MII PHY is used, with the current
driver, this bit never clears and the driver therefore doesn't work.

The reason is that the PS bit of the GMAC_CONTROL register should be
correctly configured for the DMA reset to work. When the PS bit is 0,
it tells the MAC we have a GMII PHY, when the PS bit is 1, it tells
the MAC we have a MII PHY.

Doing a DMA reset clears all registers, so the PS bit is cleared as
well. This makes the DMA reset work fine with a GMII PHY. However,
with MII PHY, the PS bit should be set.

We have identified this issue thanks to two SPEAr600 platform:

- One equipped with a GMII PHY, with which the existing driver was
working fine.

- One equipped with a MII PHY, where the current driver fails because
the DMA reset times out.

Note: Taken from https://www.spinics.net/lists/netdev/msg432578.html

Signed-off-by: Quentin Schulz 
Acked-by: Joe Hershberger

SPDX: Convert all of our single license tags to Linux Kernel style

2018-05-07T13:34:12+00:00

When U-Boot started using SPDX tags we were among the early adopters and
there weren't a lot of other examples to borrow from.  So we picked the
area of the file that usually had a full license text and replaced it
with an appropriate SPDX-License-Identifier: entry.  Since then, the
Linux Kernel has adopted SPDX tags and they place it as the very first
line in a file (except where shebangs are used, then it's second line)
and with slightly different comment styles than us.

In part due to community overlap, in part due to better tag visibility
and in part for other minor reasons, switch over to that style.

This commit changes all instances where we have a single declared
license in the tag as both the before and after are identical in tag
contents.  There's also a few places where I found we did not have a tag
and have introduced one.

Signed-off-by: Tom Rini

Remove unnecessary instances of DECLARE_GLOBAL_DATA_PTR

2018-04-27T18:54:48+00:00

We have a large number of places where while we historically referenced
gd in the code we no longer do, as well as cases where the code added
that line "just in case" during development and never dropped it.

Signed-off-by: Tom Rini

NET: designware: fix clock enable

2018-02-26T21:49:26+00:00

After commit ba1f966725223 ("net: designware: add clock support")
we got NET broken on axs101 and axs103 platforms.

Some clock don't support gating so their clock drivers don't
implement .enable/.disable callbacks. In such case clk_enable
returns -ENOSYS.
Also some clock drivers implement .enable/.disable callbacks not for all
clock IDs and return -ENOSYS (or -ENOTSUPP) for others.

If we have such clock in 'clocks' list of designware ethernet controller
node we fail to probe designware ethernet.

Fix it.

Signed-off-by: Eugeniy Paltsev 
Reviewed-by: Patrice Chotard 
Acked-by: Joe Hershberger 
Reviewed-by: Philipp Tomsich

net: designware: Pad small packets

2018-01-15T18:05:21+00:00

Make sure that we pad small packets to a minimum length of 60 bytes
(without FCS). This is necessary to interface with Ethernet switches
that will reject RUNT frames unless padded correctly.

Signed-off-by: Florian Fainelli

net: designware: add clock support

2018-01-15T18:05:20+00:00

This implementation manages several clocks, disable and
free all of them in case of error during probe and in remove
callback.

Signed-off-by: Patrice Chotard 
Reviewed-by: Simon Glass 
Acked-by: Joe Hershberger

net: designware: Convert to livetree

2017-09-18T18:40:34+00:00

Update the Designware Ethernet MAC driver to support a live device
tree.

Signed-off-by: Philipp Tomsich 
Acked-by: Joe Hershberger 
Reviewed-by: Simon Glass

rockchip: net: dm: convert fdt_get to dev_read

2017-07-11T10:13:43+00:00

With the new dev_read functions available, we can convert the rockchip
architecture-specific drivers and common drivers used by these devices
over to the dev_read family of calls.

This covers the Gigabit Ethernet MAC (i.e. common designware driver and
rockchip-specific wrapper).

Signed-off-by: Philipp Tomsich 
Reviewed-by: Simon Glass

net: designware: Add phy supply support

2017-06-02T19:44:18+00:00

Some board need a regulator for gmac phy, so add this code to handle it.
Signed-off-by: Jacob Chen 
Acked-by: Joe Hershberger