u-boot.git/drivers/net/designware.h, branch v2017.01

net: designware: Make driver independent from DM_GPIO again

2016-07-06T15:45:00Z

Commit 90b7fc924adf "net: designware: support phy reset device-tree bindings" made DW GMAC driver dependent on DM_GPIO by unconditional usage of purely DM_GPIO stuff like: * dm_gpio_XXX() * gpio_request_by_name() But since that driver as of today might be easily used without DM_GPIO (that's the case for Synopsys AXS10x boards) we're shielding all DM_GPIO things by ifdefs. Signed-off-by: Alexey Brodkin Cc: Simon Glass Cc: Beniamino Galvani Cc: Joe Hershberger Cc: Sjoerd Simons Cc: Sonic Zhang Cc: Bin Meng Cc: Marek Vasut Reviewed-by: Simon Glass Acked-by: Joe Hershberger

Merge git://git.denx.de/u-boot-rockchip

2016-05-27T19:48:53Z

net: designware: fix descriptor layout and warnings on 64-bit archs

2016-05-27T19:39:46Z

All members of the DMA descriptor must be 32-bit, even on 64-bit architectures: change the type to u32 to ensure this. Also, fix other warnings. Signed-off-by: Beniamino Galvani Acked-by: Joe Hershberger Reviewed-by: Simon Glass [trini: Use phys_addr_t not unsigned long long to test that we're within DMA'able memory] Signed-off-by: Tom Rini

net: designware: support phy reset device-tree bindings

2016-05-27T15:00:48Z

Add support for the snps,reset-gpio, snps,reset-active-low (optional) and snps,reset-delays-us device-tree bindings. The combination of these three define how the PHY should be reset to ensure it's in a sane state. Signed-off-by: Sjoerd Simons Reviewed-by: Simon Glass

net/designware: add support of max-speed device tree property

2016-01-28T18:32:44Z

This property allows to specify fastest connection mode supported by the MAC (as opposed to features of the phy). There are situations when phy may handle faster modes than the MAC (or even it's particular implementation or even due to CPU being too slow). This property is a standard one in Linux kernel these days and some boards do already use it in their device tree descriptions. Signed-off-by: Alexey Brodkin Cc: Bin Meng Cc: Joe Hershberger Cc: Sonic Zhang cc: Simon Glass Acked-by: Joe Hershberger

dm: net: Adjust designware driver to support driver model

2015-04-18T17:11:37Z

Add driver model support to the designware driver. This reuses most of the existing code except for some duplication in the probe() method. Signed-off-by: Simon Glass Acked-by: Joe Hershberger

net: configure DWMAC DMA by default AXI burst length

2015-03-05T16:17:53Z

Board can define its own AXI burst length to improve DWMAC DMA performance. v2-changes: - Avoid write burst len register when the Macro is not defined. v3-changes: - Add axi_bus register member to struct eth_dma_regs. Signed-off-by: Sonic Zhang Acked-by: Joe Hershberger

net/designware: Make DMA burst length configurable and reduce by default

2014-05-25T15:23:58Z

The correct value for this setting can vary across SoCs and boards, so make it configurable. Also reduce the default value to 8, which is the same default as used in the Linux driver. Signed-off-by: Ian Campbell Cc: Alexey Brodkin

net/designware: reorder struct dw_eth_dev to pack more efficiently.

2014-05-25T15:23:48Z

On Thu, 2014-05-08 at 22:26 +0100, Ian Campbell wrote: > The {r,t}xbuffs fields also need to be aligned. Previously this was done > implicitly because they immediately followed the descriptor tables. Make this > explicit and also move to the head of the struct. Looks like I managed to not actually commit the move of the field to the head of the struct! v3.1 follows.... Ian. 8<------------ >From 2937ba01841887317f6792709ed57cb86b5fc0cd Mon Sep 17 00:00:00 2001 From: Ian Campbell Date: Thu, 1 May 2014 19:45:15 +0100 Subject: [PATCH] net/designware: reorder struct dw_eth_dev to pack more efficiently. The {tx,rx}_mac_descrtable fields are aligned to ARCH_DMA_MINALIGN, which could be 256 or even larger. That means there is a potentially huge hole in the struct before those fields, so move them to the front where they are better packed. Moving them to the front also helps ensure that so long as dw_eth_dev is properly aligned (which it is since "net/designware: ensure device private data is DMA aligned.") the {tx,rx}_mac_descrtable will be too, or at least avoids having to worry too much about compiler specifics. The {r,t}xbuffs fields also need to be aligned. Previously this was done implicitly because they immediately followed the descriptor tables. Make this explicit and also move to the head of the struct. Signed-off-by: Ian Campbell Cc: Alexey Brodkin Tested-by: Siarhei Siamashka Reviewed-by: Siarhei Siamashka

net/designware: align DMA buffer descriptors to D$ line

2014-03-28T19:06:30Z

It's important to have ability to flush/invalidate each DMA buffer descriptor individually to prevent incoherency of adjacent BDs. Signed-off-by: Alexey Brodkin Cc: Vineet Gupta Cc: Joe Hershberger Cc: Vipin Kumar Cc: Stefan Roese Cc: Shiraz Hashim Cc: Albert ARIBAUD Cc: Amit Virdi Cc: Sonic Zhang