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<title>u-boot.git/drivers/net/fsl-mc, branch v2017.07</title>
<subtitle>Unnamed repository; edit this file 'description' to name the repository.</subtitle>
<id>http://cgit.235523.xyz/u-boot.git/atom/drivers/net/fsl-mc?h=v2017.07</id>
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<updated>2017-06-05T16:30:55Z</updated>
<entry>
<title>common: freescale: Move arch-specific declarations</title>
<updated>2017-06-05T16:30:55Z</updated>
<author>
<name>Simon Glass</name>
<email>sjg@chromium.org</email>
</author>
<published>2017-05-17T14:23:06Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=6e2941d787819ae1221d7f8295fa67d2ba94a913'/>
<id>urn:sha1:6e2941d787819ae1221d7f8295fa67d2ba94a913</id>
<content type='text'>
The declarations should not be in common.h. Move them to the arch-specific
headers.

Signed-off-by: Simon Glass &lt;sjg@chromium.org&gt;
[trini: Fixup thinko defined(FSL_LSCH3) -&gt; defined(CONFIG_FSL_LSCH3)]
Signed-off-by: Tom Rini &lt;trini@konsulko.com&gt;
</content>
</entry>
<entry>
<title>drivers: net: fsl-mc: Include MAC addr fixup to DPL</title>
<updated>2017-06-02T02:56:24Z</updated>
<author>
<name>Bogdan Purcareata</name>
<email>bogdan.purcareata@nxp.com</email>
</author>
<published>2017-05-24T16:40:22Z</published>
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<id>urn:sha1:1161dbcc0a36ef9629ec090fdeeaf964e6682c41</id>
<content type='text'>
Previous to MC v10.x, port mac address was specified via DPL. Since
newer MC versions are compatible with old style DPLs, make the u-boot
env mac addresses visible there. This applies only to DPLs that have
an older version.

DPLs use 32 bit values for specifying MAC addresses. U-boot
environment variables take precedence over the MAC addresses already
visible in the DPL/DPC.

Signed-off-by: Bogdan Purcareata &lt;bogdan.purcareata@nxp.com&gt;
Signed-off-by: Heinz Wrobel &lt;heinz.wrobel@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
<entry>
<title>drivers: net: fsl-mc: Link MC boot to PHY_RESET_R</title>
<updated>2017-06-02T02:55:50Z</updated>
<author>
<name>Bogdan Purcareata</name>
<email>bogdan.purcareata@nxp.com</email>
</author>
<published>2017-05-24T16:40:21Z</published>
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<id>urn:sha1:33a8991a877847e39bc6b525f65664be026ba45b</id>
<content type='text'>
DPAA2 platforms boot the Management Complex based on the u-boot env
variable "mcinitcmd". Instead of doing this step on each platform
individually, define a single mc_env_boot function in the MC driver,
since it's semantically tied to it.

Call the function in a per-board reset_phy hook, as it gets called at a
later moment, when all board PHY devices have been initialized.

Signed-off-by: Bogdan Purcareata &lt;bogdan.purcareata@nxp.com&gt;
Signed-off-by: Heinz Wrobel &lt;heinz.wrobel@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
<entry>
<title>driver: net: fsl-mc: Update fsl_mc_ldpaa_exit() path</title>
<updated>2017-05-23T16:24:59Z</updated>
<author>
<name>Yogesh Gaur</name>
<email>yogeshnarayan.gaur@nxp.com</email>
</author>
<published>2017-04-27T04:44:16Z</published>
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<id>urn:sha1:42e8179007bbfc5f4c0c80cd2131db8138f8546f</id>
<content type='text'>
Earlier when MC is loaded but DPL is not deployed results in FDT
fix-up code execution hangs. For this case now print message on
console and return success instead of return -ENODEV. This update
allows fdt fixup to continue execution.

Signed-off-by: Yogesh Gaur &lt;yogeshnarayan.gaur@nxp.com&gt;
Signed-off-by: Priyanka Jain &lt;Priyanka.jain@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
<entry>
<title>driver: net: fsl-mc: Update calculation of MC RAM</title>
<updated>2017-03-14T15:44:03Z</updated>
<author>
<name>York Sun</name>
<email>york.sun@nxp.com</email>
</author>
<published>2017-03-06T17:02:29Z</published>
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<id>urn:sha1:437858b62010f3d67694b117952b62d4be86e976</id>
<content type='text'>
Since the reserved RAM is tracked by gd-&gt;arch.resv_ram, calculation
of MC memory blocks can be simplified. The MC RAM is guaranteed to be
aligned by the reservation process.

Signed-off-by: York Sun &lt;york.sun@nxp.com&gt;
CC: Priyanka Jain &lt;priyanka.jain@nxp.com&gt;
Acked-by: Joe Hershberger &lt;joe.hershberger@ni.com&gt;
</content>
</entry>
<entry>
<title>armv8: layerscape: Rewrite memory reservation</title>
<updated>2017-03-14T15:44:03Z</updated>
<author>
<name>York Sun</name>
<email>york.sun@nxp.com</email>
</author>
<published>2017-03-06T17:02:28Z</published>
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<id>urn:sha1:36cc0de0b919c0e185739142742e0a76a7c5c30a</id>
<content type='text'>
For ARMv8 Layerscape SoCs, secure memory and MC memorey are reserved
at the end of DDR. DDR is spit into two or three banks. This patch
reverts commit aabd7ddb and simplifies the calculation of reserved
memory, and moves the code into common SoC file. Secure memory is
carved out first. DDR bank size is reduced. Reserved memory is then
allocated on the top of available memory. U-Boot still has access
to reserved memory as data transferring is needed. Device tree is
fixed with reduced memory size to hide the reserved memory from OS.
The same region is reserved for efi_loader.

Signed-off-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
<entry>
<title>drivers: net: fsl-mc: Fixup MAC addresses in DPC</title>
<updated>2017-01-31T17:25:21Z</updated>
<author>
<name>Bogdan Purcareata</name>
<email>bogdan.purcareata@nxp.com</email>
</author>
<published>2017-01-11T15:58:36Z</published>
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<id>urn:sha1:5707dfb02e0886ab69d51bfc161cd80b3e33a864</id>
<content type='text'>
Fixup port_mac_address property in MC DPC with values from the u-boot
environment. Since u-boot already reads the environment MAC addresses
when probing the PHYs, use these values.

The u-boot environment MAC addresses take precedence over any eventual
ones defined in the DPC, except for the case where they are randomly
assigned (no u-boot env value declared for port).

The patch assumes the "/board_info/ports/" node is present in the DPC.

Signed-off-by: Bogdan Purcareata &lt;bogdan.purcareata@nxp.com&gt;
Reviewed-by: Prabhakar Kushwaha &lt;prabhakar.kushwaha@nxp.com&gt;
[York S: Fix several indentations]
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
<entry>
<title>driver: fsl-mc: qbman: Add QBMAN 4.1 support</title>
<updated>2016-12-15T19:57:05Z</updated>
<author>
<name>Priyanka Jain</name>
<email>priyanka.jain@nxp.com</email>
</author>
<published>2016-12-07T06:34:05Z</published>
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<id>urn:sha1:8e62f1ee03c82ad285a4e2245e25fc348320749e</id>
<content type='text'>
LS2080A SoC family has QBMAN ver 4.0 whereas newer
SoCs like LS2088A, LS1088A has QBMAN ver 4.1
QBMAN ver 4.0 and ver 4.1 supports dqrr size as 4 and 8 respectively.

Add support of
	to check QBMAN version based on SoC SVR
	update dqrr_size accordingly
	update code to support larger dqrr_size

Signed-off-by: Priyanka Jain &lt;priyanka.jain@nxp.com&gt;
Signed-off-by: Prabhakar Kushwaha &lt;prabhakar.kushwaha@nxp.com&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
</content>
</entry>
<entry>
<title>ls2080: Exit dpaa only right before exiting U-Boot</title>
<updated>2016-11-17T13:18:55Z</updated>
<author>
<name>Alexander Graf</name>
<email>agraf@suse.de</email>
</author>
<published>2016-11-17T00:02:57Z</published>
<link rel='alternate' type='text/html' href='http://cgit.235523.xyz/u-boot.git/commit/?id=b7b8410a8fee9eda7b062a86a07dda0b97c49f8a'/>
<id>urn:sha1:b7b8410a8fee9eda7b062a86a07dda0b97c49f8a</id>
<content type='text'>
On ls2080 we have a separate network fabric component which we need to
shut down before we enter Linux (or any other OS). Along with that also
comes configuration of the fabric using a description file.

Today we always stop and configure the fabric in the boot script and
(again) exit it on device tree generation. This works ok for the normal
booti case, but with bootefi the payload we're running may still want to
access the network.

So let's add a new fsl_mc command that defers configuration and stopping
the hardware to when we actually exit U-Boot, so that we can still use
the fabric from an EFI payload.

For existing boot scripts, nothing should change with this patch.

Signed-off-by: Alexander Graf &lt;agraf@suse.de&gt;
Reviewed-by: York Sun &lt;york.sun@nxp.com&gt;
[agraf: Fix x86 build]
</content>
</entry>
<entry>
<title>armv8: LS2080A: Consolidate LS2080A and LS2085A</title>
<updated>2016-04-06T17:26:46Z</updated>
<author>
<name>York Sun</name>
<email>york.sun@nxp.com</email>
</author>
<published>2016-04-04T18:41:26Z</published>
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<id>urn:sha1:3c1d218a1d3048fb576677c47eab43049d0b7778</id>
<content type='text'>
LS2080A is the primary SoC, and LS2085A is a personality with AIOP
and DPAA DDR. The RDB and QDS boards support both personality. By
detecting the SVR at runtime, a single image per board can support
both SoCs. It gives users flexibility to swtich SoC without the need
to reprogram the board.

Signed-off-by: York Sun &lt;york.sun@nxp.com&gt;
CC: Prabhakar Kushwaha &lt;prabhakar.kushwaha@nxp.com&gt;
Reviewed-by: Prabhakar Kushwaha &lt;prabhakar.kushwaha@nxp.com&gt;
</content>
</entry>
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