u-boot.git/drivers/net/fsl_enetc.c, branch main

net: fsl_enetc: Add support for i.MX952

2026-05-15T20:31:40Z

Extend ENETC driver to support i.MX952 platform where 2 ENETC controllers are located on different PCIe buses. Key changes: - Add enetc_dev_id_imx() to derive device ID from device tree "reg" property for i.MX952, mapping bus_devfn values 0x0 and 0x100 to device IDs 0 and 1 respectively - Implement imx952_netcmix_init() to configure MII protocol and PCS settings based on PHY mode parsed from device tree - Add i.MX952 to FSL_ENETC_NETC_BLK_CTRL Kconfig dependencies Signed-off-by: Ye Li Signed-off-by: Alice Guo Reviewed-by: Peng Fan

net: fsl_enetc: fix the duplex setting on the iMX platform

2026-05-15T20:31:40Z

The iMX and LS platforms use different bits in the same register to set duplex, but their logics are opposite. The current settings will result in unexpected configurations in RGMII mode. Fixes: e6df2f5e22c6 ("net: fsl_enetc: Update enetc driver to support i.MX95") Signed-off-by: Clark Wang Signed-off-by: Alice Guo Reviewed-by: Tim Harvey

net: fsl_enetc: Add iMX95 enetc4 10Gbps port support

2026-04-21T23:49:39Z

1. Add optional serdes-supply regulator property support. 2. Enable 10Gbps feature for the controller, configure netc blkctrl CFG_LINK_PCS_PROT_2 to 10G SXGMII. 3. Add internal xpcs phy initialization to 10G XGMII Mode without auto-negotiation interface. Signed-off-by: Ye Li Signed-off-by: Alice Guo

net: Add to some platforms

2025-08-01T07:30:47Z

The common portable header for CPU related functions such as cache flushing and invalidation is so add that to these drivers. Signed-off-by: Tom Rini

net: fsl_enetc: fix imdio register calculation

2025-05-12T21:43:19Z

With commit cc4e8af2c552, fsl_enetc register accessors have been split to handle different register offsets on different SoCs. However, for internal MDIO register calculation, only ENETC_PM_IMDIO_BASE was fixed without adding the SoC specific MAC register offset. As a result, the network support for the Kontron SMARC-sAL28 and probably other boards based on the LS1028A CPU is broken. Add the SoC specific MAC register offset to calculation of imdio.priv to fix this. Fixes: cc4e8af2c552 ("net: fsl_enetc: Split register accessors") Signed-off-by: Thomas Schaefer Signed-off-by: Heiko Thiery Reviewed-by: Michael Walle Reviewed-by: Vladimir Oltean Tested-by: Vladimir Oltean # LS1028A Tested-by: Tim Harvey # imx95_19x19_evk Reviewed-by: Marek Vasut Reviewed-by: Alice Guo

net: fsl_enetc: Enable optional ENETREF clock on i.MX95

2025-01-27T03:27:54Z

The ENETCv4 port DT nodes on i.MX95 may contain optional clock phandle to IMX95_CLK_ENETREF "ref" clock. These "ref" clock must be enabled for the ethernet to work. These "ref" clock are enabled after cold boot, but when the system booted Linux and rebooted, those "ref" clock might have been disabled in the process, which would make ethernet inoperable after reboot. Make sure those "ref" clock are always correctly enabled. Signed-off-by: Marek Vasut

net: fsl_enetc: Update enetc driver to support i.MX95

2025-01-20T11:40:39Z

i.MX95 uses enetc version 4.1 controller. Update the enetc for i.MX95. Add ARM-specific cache handling and i.MX95 specific register layout handling. Signed-off-by: Alice Guo Signed-off-by: Marek Vasut # Clean up Signed-off-by: Ye Li Reviewed-by: Tim Harvey

net: fsl_enetc: Pass udevice pointer to accessors

2025-01-20T11:40:39Z

Pass struct udevice * into the register accessors, so the accessors can reach driver data, which contain device specific register offsets. Signed-off-by: Marek Vasut

net: fsl_enetc: Introduce driver data

2025-01-20T11:40:39Z

Introduce driver data for each PCI device. The driver data carry offsets of registers which differ between different SoCs. Signed-off-by: Marek Vasut

net: fsl_enetc: Split register accessors

2025-01-20T11:40:39Z

Split register accessors to the port base/station interface/port/mac registers as those are at different offsets on different SoCs. This is a preparatory patch which will allow addition of adjusted offsets for new SoCs easily. Signed-off-by: Marek Vasut