The common portable header for CPU related functions such as cache
flushing and invalidation is <cpu_func.h> so add that to these drivers.

Signed-off-by: Tom Rini <trini@konsulko.com>

With commit cc4e8af2c552, fsl_enetc register accessors have been split to
handle different register offsets on different SoCs. However, for
internal MDIO register calculation, only ENETC_PM_IMDIO_BASE was fixed
without adding the SoC specific MAC register offset.

As a result, the network support for the Kontron SMARC-sAL28 and
probably other boards based on the LS1028A CPU is broken.

Add the SoC specific MAC register offset to calculation of imdio.priv to
fix this.

Fixes: cc4e8af2c552 ("net: fsl_enetc: Split register accessors")
Signed-off-by: Thomas Schaefer <thomas.schaefer@kontron.com>
Signed-off-by: Heiko Thiery <heiko.thiery@gmail.com>
Reviewed-by: Michael Walle <mwalle@kernel.org>
Reviewed-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Tested-by: Vladimir Oltean <vladimir.oltean@nxp.com> # LS1028A
Tested-by: Tim Harvey <tharvey@gateworks.com> # imx95_19x19_evk
Reviewed-by: Marek Vasut <marex@denx.de>
Reviewed-by: Alice Guo <alice.guo@nxp.com>

The ENETCv4 port DT nodes on i.MX95 may contain optional clock phandle
to IMX95_CLK_ENETREF "ref" clock. These "ref" clock must be enabled for
the ethernet to work. These "ref" clock are enabled after cold boot, but
when the system booted Linux and rebooted, those "ref" clock might have
been disabled in the process, which would make ethernet inoperable after
reboot. Make sure those "ref" clock are always correctly enabled.

Signed-off-by: Marek Vasut <marex@denx.de>

i.MX95 uses enetc version 4.1 controller. Update the enetc for i.MX95.
Add ARM-specific cache handling and i.MX95 specific register layout
handling.

Signed-off-by: Alice Guo <alice.guo@nxp.com>
Signed-off-by: Marek Vasut <marex@denx.de> # Clean up
Signed-off-by: Ye Li <ye.li@nxp.com>
Reviewed-by: Tim Harvey <tharvey@gateworks.com>

Pass struct udevice * into the register accessors, so the accessors can reach
driver data, which contain device specific register offsets.

Signed-off-by: Marek Vasut <marex@denx.de>

Introduce driver data for each PCI device. The driver data carry
offsets of registers which differ between different SoCs.

Signed-off-by: Marek Vasut <marex@denx.de>

Split register accessors to the port base/station interface/port/mac
registers as those are at different offsets on different SoCs. This
is a preparatory patch which will allow addition of adjusted offsets
for new SoCs easily.

Signed-off-by: Marek Vasut <marex@denx.de>

Move register accessors from header files and turn them into proper
inline functions, so typechecking can be done on them. Drop no longer
enetc_port_regs() and unused enetc_read() and enetc_bdr_read().

Signed-off-by: Marek Vasut <marex@denx.de>

Introduce mapping function enetc_dev_id(), which converts PCIe BDF of
the ENETC into linear incrementing index usable e.g. as interface index.
This replaces the current ad-hoc calculation used in the code with a
dedicated function. No functional change.

Signed-off-by: Marek Vasut <marex@denx.de>

Rename the current driver structure and matching ops and PCI IDs
and add _ls suffix to indicate this content is LS specific. This
is done in preparation for addition of i.MX95 ENETCv4 which will
require slightly different structure content.

Signed-off-by: Marek Vasut <marex@denx.de>