u-boot.git/drivers/net/ldpaa_eth, branch v2018.03

driver: net: fsl-mc: flib changes for MC 10.3.0

2017-12-06T22:55:17+00:00

Existing MC driver framework is based on MC-9.x.x flib. This patch
migrates MC obj (DPBP, DPNI, DPRC, DPMAC etc) to use latest MC flib
which is MC-10.3.0.

Changes introduced due to migration:
1. To get OBJ token, pair of create and open API replaces create APIs
2. Pair of close and destroy APIs replaces destroy APIs
3. For version read, get_version APIs replaces get_attributes APIs
4. dpni_get/reset_statistics APIs replaces dpni_get/set_counter APIs
5. Simplifies struct dpni_cfg and removes dpni_extended_cfg struct
6. Single API dpni_get_buffer_layout/set_buffer_layout replaces
   dpni_get_rx/set_rx, tx related, tx_conf_buffer_layout related APIs.
   New API takes a queue type as an argument.
7. Similarly dpni_get_queue/set_queue replaces
   dpni_get_rx_flow/set_rx_flow , tx_flow related, tx_conf related
   APIs

Signed-off-by: Yogesh Gaur 
Signed-off-by: Priyanka Jain 
Reviewed-by: York Sun

drivers: net: ldpaa_eth: Correct error handler for qbman_swp_acquire()

2017-11-14T16:33:20+00:00

The zero value returned from qbman_swp_acquire() is an error
condition meaning no free buffer for allocation.

Signed-off-by: Ashish Kumar 
Signed-off-by: Kushwaha Prabhakar 
[YS: revised commit message]
Reviewed-by: York Sun

armv8: ls1088aqds: Change phy mode to PHY_INTERFACE_MODE_RGMII_ID

2017-10-27T15:41:12+00:00

Since TX delay is now enabled only in PHY_INTERFACE_MODE_RGMII_ID
PHY_INTERFACE_MODE_RGMII_TXID.

These change where introduced in phy driver in commit 05b29aa0cb68
("net: phy: realtek: fix enabling of the TX-delay for RTL8211F").

Signed-off-by: Ashish Kumar 
Reviewed-by: York Sun

armv8: fsl-layerscape: Support to add RGMII for ls1088aqds

2017-09-11T15:01:05+00:00

This patch adds support for RGMII protocol

NXP's LDPAA2 support RGMII protocol. LS1088A is the
first Soc supporting both RGMII and SGMII.

Signed-off-by: Prabhakar Kushwaha 
Signed-off-by: Amrita Kumari 
Signed-off-by: Ashish Kumar 
Reviewed-by: York Sun

armv8: ls1088a: Add NXP LS1088A SoC support

2017-09-11T15:00:13+00:00

LS1088A is compliant with the Layerscape Chassis Generation 3 with
eight ARM v8 Cortex-A53 cores in 2 cluster, CCI-400, one 64-bit DDR4
SDRAM memory controller with ECC, Data path acceleration architecture
2.0 (DPAA2), Ethernet interfaces (SGMIIs, RGMIIs, QSGMIIs, XFIs),
QSPI, IFC, PCIe, SATA, USB, SDXC, DUARTs etc.

Signed-off-by: Alison Wang 
Signed-off-by: Prabhakar Kushwaha 
Signed-off-by: Ashish Kumar 
Signed-off-by: Raghav Dogra 
Signed-off-by: Shaohui Xie 
[YS: Revised commit message]
Reviewed-by: York Sun

driver: net: ldpaa: Update priv->phydev after free()

2017-08-14T17:47:33+00:00

Even after memory free of phydev, priv is still pointing to the
obsolete address.
So update priv->phydev as NULL after memory free.

Signed-off-by: Prabhakar Kushwaha 
Signed-off-by: Ashish Kumar 
Acked-by: Joe Hershberger

armv8: ls2080a: Drop macro CONFIG_LS2080A

2017-04-17T16:03:30+00:00

Use CONFIG_ARCH_LS2080A instead.

Signed-off-by: York Sun

arm: fsl-layerscape: Move QSGMII wriop_init to SoC file

2017-03-28T16:08:25+00:00

MAC number used per QSGMII is not fixed. It may wary from SoC to SoC.

So move QSGMII wriop_init_dpmac() to SoC file.

Signed-off-by: Prabhakar Kushwaha 
Signed-off-by: Ashish Kumar 
Reviewed-by: York Sun

driver: net: ldpaa_eth: Fix missing bracket issue

2016-11-21T17:20:32+00:00

Signed-off-by: Priyanka Jain 
Signed-off-by: Prabhakar Kushwaha 
Signed-off-by: Ashish Kumar 
Acked-by: Joe Hershberger 
Reviewed-by: York Sun

drivers: net: ldpaa: Memset pools_params as "0" before use

2016-05-03T22:52:11+00:00

Memset pools_params as "0" to avoid garbage value in dpni_set_pools.

Signed-off-by: Prabhakar Kushwaha 
Reported-by: Jose Rivera 
Acked-by: Joe Hershberger