u-boot.git/drivers/net/phy/Kconfig, branch v2020.04

phy: Add support for the NC-SI protocol

2020-03-09T23:11:23Z

This introduces support for the NC-SI protocol, modelled as a phy driver for other ethernet drivers to consume. NC-SI (Network Controller Sideband Interface) is a protocol to manage a sideband connection to a proper network interface, for example a BMC (Baseboard Management Controller) sharing the NIC of the host system. Probing and configuration occurs by communicating with the "remote" NIC via NC-SI control frames (Ethernet header 0x88f8). This implementation is roughly based on the upstream Linux implementation[0], with a reduced feature set and an emphasis on getting a link up as fast as possible rather than probing the full possible topology of the bus. The current phy model relies on the network being "up", sending NC-SI command frames via net_send_packet() and receiving them from the net_loop() loop (added in a following patch). The ncsi-pkt.h header[1] is copied from the Linux kernel for consistent field definitions. [0]: https://github.com/torvalds/linux/tree/master/net/ncsi [1]: https://github.com/torvalds/linux/blob/master/net/ncsi/ncsi-pkt.h Signed-off-by: Samuel Mendoza-Jonas Reviewed-by: Joel Stanley Acked-by: Joe Hershberger

net: phy: fix switch vendor name

2019-12-09T15:47:42Z

Fix vendor name in MV88E61xx option description. Signed-off-by: Anatolij Gustschin Reviewed-by: Chris Packham Tested-by: Chris Packham Acked-by: Joe Hershberger

Convert CONFIG_SYS_CORTINA_FW_IN_MMC et al to Kconfig

2019-12-03T13:43:24Z

This converts the following to Kconfig: CONFIG_SYS_CORTINA_FW_IN_MMC CONFIG_SYS_CORTINA_FW_IN_NAND CONFIG_SYS_CORTINA_FW_IN_NOR CONFIG_SYS_CORTINA_FW_IN_REMOTE CONFIG_SYS_CORTINA_FW_IN_SPIFLASH Signed-off-by: Tom Rini

net: phy: Add gmiitorgmii converter support

2019-10-08T07:41:27Z

This patch adds support for gmiitorgmii converter. This converter sits between the MAC and the external phy MAC <==> GMII2RGMII <==> RGMII_PHY. The ethernet driver probes this bridge and this bridge driver probes real phy driver and invokes the real phy functionalities as requested. This bridge just needs to be configured based on real phy negotiated speed and duplex. Signed-off-by: Siva Durga Prasad Paladugu Signed-off-by: Michal Simek

net: phy: micrel: Allow KSZ8xxx and KSZ90x1 to be used together

2019-05-14T19:43:33Z

Commit d397f7c45b0b ("net: phy: micrel: Separate KSZ9000 drivers from KSZ8000 drivers") separated the KSZ8xxx and KSZ90x1 drivers and warns that you shouldn't select both of them due to a device ID clash between the KSZ9021 and the KS8721, asserting that "it is highly unlikely for a system to contain both a KSZ8000 and a KSZ9000 PHY". Unfortunately boards like the SAMA5D3xEK do contain both types of PHY, but fortunately the Linux Micrel PHY driver provides a solution by using different PHY ID and mask values to distinguish these chips. This commit contains the following changes: - The PHY ID and mask values for the KSZ9021 and the KS8721 now match those used by the Linux driver. - The warnings about not enabling both drivers have been removed. - The description for PHY_MICREL_KSZ8XXX has been corrected (these are 10/100 PHYs, not GbE PHYs). - PHY_MICREL_KSZ9021 and PHY_MICREL_KSZ9031 no longer select PHY_GIGE since this is selected by PHY_MICREL_KSZ90X1. - All of the relevant defconfig files have been updated now that PHY_MICREL_KSZ8XXX does not default to 'Y'. Signed-off-by: James Byrne Acked-by: Joe Hershberger

net: phy: realtek: Introduce quirk to mark RXC not stoppable

2019-05-07T19:51:55Z

When EEE is supported by the PHY and the driver allows it, libphy in the kernel is configuring the PHY to stop receiving the xMII clock while it is signaling LPI. While this (usually) works fine in the kernel this is causing issues in U-Boot when rebooting from the linux kernel with this bit set (without having the possibility to reset the PHY) where the PHY suddenly stops working. A new quirk is introduced to unconditionally reset this bit. If the quirk is not enabled using the proper configuration symbol, the PHY state is not changed. Signed-off-by: Carlo Caione Acked-by: Joe Hershberger

net: phy: aquantia: add firmware loading support

2018-10-24T19:45:37Z

Aquantia phys have firmware that can be loaded automatically from storage directly attached to the phy or via MDIO commands. Add support for loading firmware from either a file or a raw location on an MMC device. Signed-off-by: Jeremy Gebben Acked-by: Joe Hershberger

configs: migrate CONFIG_PHY_AQUANTIA to Kconfig

2018-10-24T19:45:36Z

The aquantia driver requires both CONFIG_PHY_GIGE and CONFIG_PHYLIB_10G. Signed-off-by: Jeremy Gebben Acked-by: Joe Hershberger

net: phy: Don't limit phy addresses by default

2018-04-13T20:56:47Z

Some boards expect to find more than one phy while other boards are old and need to be limited to a specific phy address. Only limit the phy address for boards that opt in. Signed-off-by: Joe Hershberger Tested-by: Bin Meng Acked-by: Neil Armstrong Reviewed-by: Philipp Tomsich

net: phy: Add PHY_RTL8211E_PINE64_GIGABIT_FIX for realtek phys

2018-03-22T20:05:27Z

Setting PHY_RTL8211E_PINE64_GIGABIT_FIX forces internal rx/tx delays off on the PHY, as well as flipping some magical undocumented bits. The magic number comes from the Pine64 engineering team, presumably as a proxy from Realtek. This configuration fixes the throughput on some Pine64 models. Packet loss of up to 60-70% has been observed without this. Signed-off-by: Kyle Evans Acked-by: Joe Hershberger