u-boot.git/drivers/net/phy/marvell.c, branch master Unnamed repository; edit this file 'description' to name the repository. Revert "net: phy: marvell 88e151x: Fix handling of bare RGMII interface type" 2025-01-01T20:35:54+00:00 Rufus Segar rhs@riseup.net 2024-12-04T13:34:30+00:00 c5cda4ae4aeec7b5e23e4f48ccbe8e4e95bc326c This reverts commit 431be621c6cbc72efd1d45fa36686a682cbb470a. Section 3.3 of Reduced Gigabit Media Independent Interface (RGMII) Version 2.0 (4/1/2002) details that a PHYs using a ~2ns internal delay are referred to as RGMII-ID. This internal delay is optional. Page 147-148 of the Marvell Doc. No. MV-S107146-U0 Rev. F details timings of the RX/TX delays. We see that with the TX/RX_CLK delay enabled, our RX/TX_CTL signal is shifted w.r.t CLK to reflect the delay added. In 431be62 there is no timing difference between RGMII and RGMII-ID, and so programmers wanting to explicitly set their PHY to RGMII will find that delay added anyway. This could throw off timing if that internal delay is undesired. We should be handling all 4 possible RGMII cases of PHY_INTERFACE_MODE: RGMII, RGMII_ID, RGMII_TXID, and RGMII_RXID. Reverting 431be62 implements this. See also m88e1111_config_init_rgmii_delays in the equivalent driver in Linux (drivers/net/phy/marvell.c), which does not set these delays in RGMII mode. 68e6eca was tested out on an 88E1512 PHY in RGMII-ID mode. This reversion has been tested by myself on an 88E1518 in RGMII-ID mode. This patch affects boards using this driver in "rgmii" mode, as the internal delay will no longer be enabled. Namely kikwood-nsa310s. Signed-off-by: Rufus Segar <rhs@riseup.net> 
This reverts commit 431be621c6cbc72efd1d45fa36686a682cbb470a.

Section 3.3 of Reduced Gigabit Media Independent Interface (RGMII)
Version 2.0 (4/1/2002) details that a PHYs using a ~2ns internal delay
are referred to as RGMII-ID. This internal delay is optional.

Page 147-148 of the Marvell Doc. No. MV-S107146-U0 Rev. F details
timings of the RX/TX delays. We see that with the TX/RX_CLK delay
enabled, our RX/TX_CTL signal is shifted w.r.t CLK to reflect the delay
added.

In 431be62 there is no timing difference between RGMII and RGMII-ID, and
so programmers wanting to explicitly set their PHY to RGMII will find
that delay added anyway. This could throw off timing if that internal
delay is undesired.

We should be handling all 4 possible RGMII cases of PHY_INTERFACE_MODE:
RGMII, RGMII_ID, RGMII_TXID, and RGMII_RXID. Reverting 431be62
implements this.

See also m88e1111_config_init_rgmii_delays in the equivalent driver in
Linux (drivers/net/phy/marvell.c), which does not set these delays in
RGMII mode.

68e6eca was tested out on an 88E1512 PHY in RGMII-ID mode. This
reversion has been tested by myself on an 88E1518 in RGMII-ID mode. This
patch affects boards using this driver in "rgmii" mode, as the internal
delay will no longer be enabled. Namely kikwood-nsa310s.

Signed-off-by: Rufus Segar <rhs@riseup.net>
Restore patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet" 2024-05-20T19:35:03+00:00 Tom Rini trini@konsulko.com 2024-05-20T19:35:03+00:00 03de305ec48b0bb28554372abb40ccd46dbe0bf9 As part of bringing the master branch back in to next, we need to allow for all of these changes to exist here. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com> 
As part of bringing the master branch back in to next, we need to allow
for all of these changes to exist here.

Reported-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Tom Rini <trini@konsulko.com>
Revert "Merge patch series "arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"" 2024-05-19T14:16:36+00:00 Tom Rini trini@konsulko.com 2024-05-19T02:20:43+00:00 d678a59d2d719da9e807495b4b021501f2836ca5 When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay Ethernet"' I failed to notice that b4 noticed it was based on next and so took that as the base commit and merged that part of next to master. This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35. Reported-by: Jonas Karlman <jonas@kwiboo.se> Signed-off-by: Tom Rini <trini@konsulko.com> 
When bringing in the series 'arm: dts: am62-beagleplay: Fix Beagleplay
Ethernet"' I failed to notice that b4 noticed it was based on next and
so took that as the base commit and merged that part of next to master.

This reverts commit c8ffd1356d42223cbb8c86280a083cc3c93e6426, reversing
changes made to 2ee6f3a5f7550de3599faef9704e166e5dcace35.

Reported-by: Jonas Karlman <jonas@kwiboo.se>
Signed-off-by: Tom Rini <trini@konsulko.com>
net: Remove <common.h> and add needed includes 2024-05-07T14:00:55+00:00 Tom Rini trini@konsulko.com 2024-05-02T01:31:02+00:00 0e407c7420c4fefd7f7e6cc7c81eeec6d084f9e4 Remove <common.h> from this driver directory and when needed add missing include files directly. Signed-off-by: Tom Rini <trini@konsulko.com> 
Remove <common.h> from this driver directory and when needed
add missing include files directly.

Signed-off-by: Tom Rini <trini@konsulko.com>
net: phy: marvell: Import and use marvell_phy.h from Linux 2023-04-07T12:21:37+00:00 Marek Vasut marek.vasut+renesas@mailbox.org 2023-03-19T17:08:06+00:00 bf3dabb7de7979cbca8680e688911f36056204b1 Import marvell_phy.h from Linux 5.14.y as of commit a5de4be0aaaa6 ("net: phy: marvell10g: fix differentiation of 88X3310 from 88X3340") and use it in marvell PHY driver instead of current ad-hoc macros. Two of the PHY IDs are unknown to Linux, 88E1149S and 88E1680, for those two, only sync the length of the hexadecimal number to 8 digits. No functional change. Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Reviewed-by: Ramon Fried <rfried.dev@gmail.com> 
Import marvell_phy.h from Linux 5.14.y as of commit
a5de4be0aaaa6 ("net: phy: marvell10g: fix differentiation of 88X3310 from 88X3340")
and use it in marvell PHY driver instead of current ad-hoc macros.
Two of the PHY IDs are unknown to Linux, 88E1149S and 88E1680, for
those two, only sync the length of the hexadecimal number to 8 digits.

No functional change.

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Reviewed-by: Ramon Fried <rfried.dev@gmail.com>
net: phy: marvell: Convert to U_BOOT_PHY_DRIVER() 2023-04-07T12:18:49+00:00 Marek Vasut marek.vasut+renesas@mailbox.org 2023-03-19T17:02:54+00:00 9010be953e35d193c3948b221327d07eed9b6ae5 Convert PHY driver to U_BOOT_PHY_DRIVER() macro and drop phy_register() init call. Converted using sed "s@^static struct phy_driver \(.*\)_driver = \+{@U_BOOT_PHY_DRIVER(\L\1) = {" Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org> Acked-by: Michal Simek <michal.simek@amd.com> Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC) 
Convert PHY driver to U_BOOT_PHY_DRIVER() macro and drop phy_register() init call.

Converted using sed
"s@^static struct phy_driver \(.*\)_driver = \+{@U_BOOT_PHY_DRIVER(\L\1) = {"

Signed-off-by: Marek Vasut <marek.vasut+renesas@mailbox.org>
Acked-by: Michal Simek <michal.simek@amd.com>
Tested-by: Michal Simek <michal.simek@amd.com> #microblaze (MANUAL_RELOC)
net: phy: Remove non-DM_ETH code 2022-12-07T21:04:17+00:00 Tom Rini trini@konsulko.com 2022-11-27T15:25:20+00:00 36af92ba85ad45dfb07f1d17e8b7d6945c1ac0b4 As DM_ETH is required for all network drivers, it's now safe to remove the non-DM_ETH support code. Signed-off-by: Tom Rini <trini@konsulko.com> 
As DM_ETH is required for all network drivers, it's now safe to
remove the non-DM_ETH support code.

Signed-off-by: Tom Rini <trini@konsulko.com>
net: phy: marvell: Add support for 88E1240 PHY 2022-08-08T14:50:20+00:00 Stefan Roese sr@denx.de 2022-03-31T09:43:07+00:00 01207947d54e4d8a356a19658640213be4939f62 This patch adds basic support for the Marvell 88E1240 PHY. This will be used by the upcoming ethernet support addition for the Marvell MIPS Octeon EBB7304 platform. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Reviewed-by: Marek Behún <marek.behun@nic.cz> 
This patch adds basic support for the Marvell 88E1240 PHY.

This will be used by the upcoming ethernet support addition for the
Marvell MIPS Octeon EBB7304 platform.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
net: phy: marvell: Support reg config via "marvell, reg-init" DT property 2022-08-08T14:50:20+00:00 Stefan Roese sr@denx.de 2022-03-31T09:43:06+00:00 0ef02619ef01ad7e33805e9f9213cd289e2da0fc This patch adds support for the "marvell,reg-init" DT property, which is used to describe board specific Marvell PHY register configurations in the board dts file. This DT property is supported in the Linux Kernel since a longer time. Adding it to U-Boot now, enables the boards which describe the register settings in their DT files here as well. I've included calling this marvell_of_reg_init() to all foo_config() functions in this patch as well. If CONFIG_DM_ETH is not set, there is no ofnode, or no "marvell,reg-init" property, the PHY initialization is unchanged. The function marvell_of_reg_init() is a port of the Linux version. Please note that I explicitly did not add error checking and handling to the U-Boot version, as this is basically not done for phy_read/write in this Marvell PHY code. This will be used by the upcoming ethernet support on the MIPS Octeon EBB 7304 board. Signed-off-by: Stefan Roese <sr@denx.de> Cc: Ramon Fried <rfried.dev@gmail.com> Cc: Joe Hershberger <joe.hershberger@ni.com> Cc: Aaron Williams <awilliams@marvell.com> Cc: Chandrakala Chavva <cchavva@marvell.com> Cc: Marek Behún <marek.behun@nic.cz> Reviewed-by: Marek Behún <marek.behun@nic.cz> 
This patch adds support for the "marvell,reg-init" DT property, which
is used to describe board specific Marvell PHY register configurations
in the board dts file. This DT property is supported in the Linux Kernel
since a longer time. Adding it to U-Boot now, enables the boards which
describe the register settings in their DT files here as well.

I've included calling this marvell_of_reg_init() to all foo_config()
functions in this patch as well. If CONFIG_DM_ETH is not set, there is
no ofnode, or no "marvell,reg-init" property, the PHY initialization is
unchanged.

The function marvell_of_reg_init() is a port of the Linux version.
Please note that I explicitly did not add error checking and handling
to the U-Boot version, as this is basically not done for phy_read/write
in this Marvell PHY code.

This will be used by the upcoming ethernet support on the MIPS
Octeon EBB 7304 board.

Signed-off-by: Stefan Roese <sr@denx.de>
Cc: Ramon Fried <rfried.dev@gmail.com>
Cc: Joe Hershberger <joe.hershberger@ni.com>
Cc: Aaron Williams <awilliams@marvell.com>
Cc: Chandrakala Chavva <cchavva@marvell.com>
Cc: Marek Behún <marek.behun@nic.cz>
Reviewed-by: Marek Behún <marek.behun@nic.cz>
common: Drop linux/bitops.h from common header 2020-05-19T01:19:23+00:00 Simon Glass sjg@chromium.org 2020-05-10T17:40:13+00:00 cd93d625fd751d55c729c78b10f82109d56a5f1d Move this uncommon header out of the common header. Signed-off-by: Simon Glass <sjg@chromium.org> 
Move this uncommon header out of the common header.

Signed-off-by: Simon Glass <sjg@chromium.org>